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* Panic openly if we cannot retrieve memory information from the device tree.raj2012-05-301-3/+3
* Extract vendor specific Book-E pieces into separate files and have a commonraj2012-05-304-39/+423
* Remove redundant check, we catch ULE platform support in commonraj2012-05-271-4/+0
* Let us manage differences of Book-E PowerPC variations i.e. vendor /raj2012-05-2716-47/+168
* Import eSDHC driver for Freescale integrated controller.raj2012-05-262-0/+1603
* Move OpenPIC FDT bus glue to a shared location, so that other PowerPCraj2012-05-261-0/+0
* Retrieve CPU number info from the device tree.raj2012-05-261-18/+8
* Rename e500 prefix to match other Book-E CPU variations. CPU id tidbits forraj2012-05-263-15/+25
* Provide SPR definitions for newer Book-E (E500mc, E5500, PPC465).raj2012-05-261-0/+36
* Unify SPR defines formatting, no funtional changes.raj2012-05-261-88/+87
* Update HID defines for E500mc and E5500 CPU cores.raj2012-05-251-0/+53
* Fix physical address type to vm_paddr_t also for powerpc64.raj2012-05-251-11/+11
* Missing vm_paddr_t bits which should have been part of r235936.raj2012-05-251-4/+4
* Add a missing " to get closer to compiling.bz2012-05-241-1/+1
* Atomic operation acquire barriers also need to be isync on 64-bit systems.nwhitehorn2012-05-241-1/+1
* Revert isync for ILP32 to sync as per my original change that I discussedmarcel2012-05-241-4/+4
* MFp4 bz_ipv6_fast:bz2012-05-241-0/+4
* A few improvements:marcel2012-05-242-64/+179
* Fix physical address type to vm_paddr_t.raj2012-05-245-31/+31
* Remove Semihakf-ism. DEBUG is a kernel configuration option. Itmarcel2012-05-241-3/+0
* Just return if the size of the window is 0. This can happen when themarcel2012-05-241-1/+7
* Either the I/O port range or the memory mapped I/O range may not bemarcel2012-05-241-2/+7
* o Rename kernload_ap to bp_kernelload. This to introduce a common prefixmarcel2012-05-243-19/+39
* Fix the memory barriers for CPUs that do not like lwsync and wedge or causemarcel2012-05-241-12/+22
* Replace the list of PVOs owned by each PMAP with an RB tree. This simplifiesnwhitehorn2012-05-204-178/+76
* Fix final bugs in memory barriers on PowerPC:nwhitehorn2012-05-044-8/+10
* Add a convenience macro for the returns_twice attribute, and apply it todim2012-04-291-1/+1
* Fix build on 32-bit systems.nwhitehorn2012-04-281-1/+1
* After switching mutexes to use lwsync, they no longer provide sufficientnwhitehorn2012-04-282-30/+19
* Switch the default I/O memory barrier to eieio, as it should be. Thisnwhitehorn2012-04-241-5/+1
* Revert r234581 for this file. The lockless SLB tree code does in fact neednwhitehorn2012-04-241-2/+2
* Fix copy-and-paste error in r230400.nwhitehorn2012-04-231-1/+1
* Fix missing header for powerpc_iomb().nwhitehorn2012-04-231-0/+1
* Provide a clearer split between read/write and acquire/release barriers.nwhitehorn2012-04-221-19/+24
* Correctly specify assembler constrains for synchronization instructions.nwhitehorn2012-04-221-3/+3
* Clarify what we are doing in r234583 a little better: eieio and isync donwhitehorn2012-04-221-15/+23
* On non-64-bit systems (which generally don't have lwsync), use eieio andnwhitehorn2012-04-221-0/+5
* Use lwsync to provide memory barriers on systems that support it insteadnwhitehorn2012-04-222-22/+20
* Remove dead code. The routines in atomic.S did not work properly anyway, andnwhitehorn2012-04-222-147/+0
* Replace eieio; sync for creating bus-space memory barriers with sync.nwhitehorn2012-04-223-61/+75
* Avoid a lock order reversal in pmap_extract_and_hold() from relockingnwhitehorn2012-04-221-1/+32
* Organize some members of ucontext_t in the same order they are in thenwhitehorn2012-04-211-3/+3
* Make sure all pending operations have completed on the existing threadnwhitehorn2012-04-202-0/+2
* We don't need kcopy() in any of the remaining places it is used, sonwhitehorn2012-04-114-34/+3
* Only manipulate the PGA_EXECUTABLE flag on managed pages. This is a proxynwhitehorn2012-04-111-14/+10
* Fix error in r233949. Synchronizing icaches on uncacheable pages turns outnwhitehorn2012-04-111-2/+4
* Do not restore the register holding the TLS pointer when doing variousnwhitehorn2012-04-111-2/+12
* Execute an initial ptesync if and only if the PTE is actually beingnwhitehorn2012-04-061-14/+7
* Substantially reduce the scope of the locks held in pmap_enter(), whichnwhitehorn2012-04-061-34/+8
* Reduce the frequency that the PowerPC/AIM pmaps invalidate instructionnwhitehorn2012-04-063-57/+29
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