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* Fix the interrupt code, broken 7 months ago. The interrupt frameworkmarcel2011-01-291-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | already supported nested PICs, but was limited to having a nested AT-PIC only. With G5 support the need for nested OpenPIC controllers needed to be added. This was done the wrong way and broke the MPC8555 eval system in the process. OFW, as well as FDT, describe the interrupt routing in terms of a controller and an interrupt pin on it. This needs to be mapped to a flat and global resource: the IRQ. The IRQ is the same as the PCI intline and as such needs to be representable in 8 bits. Secondly, ISA support pretty much dictates that IRQ 0-15 should be reserved for ISA interrupts, because of the internal workins of south bridges. Both were broken. This change reverts revision 209298 for a big part and re-implements it simpler. In particular: o The id() method of the PIC I/F is removed again. It's not needed. o The openpic_attach() function has been changed to take the OFW or FDT phandle of the controller as a second argument. All bus attachments that previously used openpic_attach() as the attach method of the device I/F now implement as bus-specific method and pass the phandle_t to the renamed openpic_attach(). o Change powerpc_register_pic() to take a few more arguments. In particular: - Pass the number of IPIs specificly. The number of IRQs carved out for a PIC is the sum of the number of int. pins and IPIs. - Pass a flag indicating whether the PIC is an AT-PIC or not. This tells the interrupt framework whether to assign IRQ 0-15 or some other range. o Until we implement proper multi-pass bus enumeration, we have to handle the case where we need to map from PIC+pin to IRQ *before* the PIC gets registered. This is done in a similar way as before, but rather than carving out 256 IRQs per PIC, we carve out 128 IRQs (124 pins + 4 IPIs). This is supposed to handle the G5 case, but should really be fixed properly using multiple passes. o Have the interrupt framework set root_pic in most cases and not put that burden in PIC drivers (for the most part). o Remove powerpc_ign_lookup() and replace it with powerpc_get_irq(). Remove IGN_SHIFT, INTR_INTLINE and INTR_IGN. Related to the above, fix the Freescale PCI controller driver, broken by the FDT code. Besides not attaching properly, bus numbers were assigned improperly and enumeration was broken in general. This prevented the AT PIC from being discovered and interrupt routing to work properly. Consequently, the ata(4) controller stopped functioning. Fix the driver, and FDT PCI support, enough to get the MPC8555CDS going again. The FDT PCI code needs a whole lot more work. No breakages are expected, but lackiong G5 hardware, it's possible that there are unpleasant side-effects. At least MPC85xx support is back to where it was 7 months ago -- it's amazing how badly support can be broken in just 7 months... Sponsored by: Juniper Networks
* Remove the unneeded header <machine/intr.h>.marcel2010-07-021-1/+0
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* Unbreak build.nwhitehorn2009-12-061-1/+1
| | | | Pointy hat to: me
* MFp4:mav2009-12-061-6/+4
| | | | | | | | | | | | | | | | | | Introduce ATA_CAM kernel option, turning ata(4) controller drivers into cam(4) interface modules. When enabled, this options deprecates all ata(4) peripheral drivers (ad, acd, ...) and interfaces and allows cam(4) drivers (ada, cd, ...) and interfaces to be natively used instead. As side effect of this, ata(4) mode setting code was completely rewritten to make controller API more strict and permit above change. While doing this, SATA revision was separated from PATA mode. It allows DMA-incapable SATA devices to operate and makes hw.ata.atapi_dma tunable work again. Also allow ata(4) controller drivers (except some specific or broken ones) to handle larger data transfers. Previous constraint of 64K was artificial and is not really required by PCI ATA BM specification or hardware. Submitted by: nwitehorn (powerpc part)
* Move from using devclass_find_free_unit(ata_devclass, 0) to -1 for theimp2009-06-101-3/+1
| | | | unit number. Basically they are the same...
* Convert PowerPC AIM PCI and nexus busses to standard OFW bus interface. Thisnwhitehorn2008-10-142-4/+3
| | | | | | | | | | | simplifies certain device attachments (Kauai ATA, for instance), and makes possible others on new hardware. On G5 systems, there are several otherwise standard PCI devices (Serverworks SATA) that will not allow their interrupt properties to be written, so this information must be supplied directly from Open Firmware. Obtained from: sparc64
* Set sc_psim so that the openpic core can correct the off-by-onemarcel2008-04-031-0/+5
| | | | error in the number of IRQs that PSIM gives us.
* Add support for the BUS_CONFIG_INTR() method to the platform and tomarcel2008-03-071-0/+1
| | | | | openpic(4). Make use of it in ocpbus(4). On the MPC85xxCDS, IRQ0:4 are active-low.
* Add PIC support for IPIs. When registering an interrupt handler,marcel2008-02-121-0/+1
| | | | | | the PIC also informs the platform at which IRQ level it can start assigning IPIs, since this can depend on the number of IRQs supported for external interrupts.
* Apply missing s/rv/res/g in previous commit.marcel2007-12-211-1/+1
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* MFamd64/ia64/i386: Only set the rman bus tags and handles injhb2007-12-201-2/+1
| | | | | | | bus_activate_resource() methods instead of splitting it up between bus_alloc_resource() and bus_activate_resource(). Glanced at by: marcel
* Redefine bus_space_tag_t on PowerPC from a 32-bit integral tomarcel2007-12-191-6/+3
| | | | | | | | | | | | | | | | | | | | | | a pointer to struct bus_space. The structure contains function pointers that do the actual bus space access. The reason for this change is that previously all bus space accesses were little endian (i.e. had an explicit byte-swap for multi-byte accesses), because all busses on Macs are little endian. The upcoming support for Book E, and in particular the E500 core, requires support for big-endian busses because all embedded peripherals are in the native byte-order. With this change, there's no distinction between I/O port space and memory mapped I/O. PowerPC doesn't have I/O port space. Busses assign tags based on the byte-order only. For that purpose, two global structures exist (bs_be_tag and bs_le_tag), of which the address can be taken to get a valid tag. Obtained from: Juniper, Semihalf
* Revamp the interrupt handling in support of INTR_FILTER. This includes:marcel2007-08-111-128/+14
| | | | | | | | | | | | | | | | | | | | | | | o Revamp the PIC I/F to only abstract the PIC hardware. The resource handling has been moved to nexus, where it belongs. o Include EOI and MASK+EOI methods to the PIC I/F in support of INTR_FILTER. o With the allocation of interrupt resources and setup of interrupt handlers in the common platform code we can delay talking to the PIC hardware after enumeration of all devices. Introduce a call to powerpc_intr_enable() in configure_final() to achieve that and have powerpc_setup_intr() only program the PIC when !cold. o As a consequence of the above, remove all early_attach() glue from the OpenPIC and Heathrow PIC drivers and have them register themselves when they're found during enumeration. o Decouple the interrupt vector from the interrupt request line. Allocate vectors increasingly so that they can be used for the intrcnt index as well. Extend the Heathrow PIC driver to translate between IRQ and vector. The OpenPIC driver already has the support for vectors in hardware. Approved by: re (blanket)
* Turn this into an uart(4) bus attachment.marcel2006-07-261-40/+19
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* Repocopy from: src/sys/powerpc/psim/sio_iobus.cmarcel2006-07-261-108/+0
| | | | | | to: src/sys/powerpc/psim/uart_iobus.c Meister: simon@
* Set the rid for any resource obtained from rman_resource_reserve.imp2006-04-201-0/+1
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* ata_generic_hw takes a dev as a parameter, not a channel.grehan2005-11-111-1/+1
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* Remove bus_{mem,p}io.h and related code for a micro-optimization on i386nyan2005-05-292-2/+0
| | | | | | and amd64. The optimization is a trivial on recent machines. Reviewed by: -arch (imp, marcel, dfr)
* Unbreak the powerpc build by fixing some ATA constants that were renamed.ssouhlal2005-04-121-3/+3
| | | | Approved by: grehan (mentor)
* Introduce channel-level setmode newbus method.grehan2005-04-011-0/+13
| | | | Thanks to sos for the code re-org that allowed this.
* Catch up with ATA-mkIIIgrehan2005-03-311-17/+2
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* Long overdue sync-up with ATA codegrehan2005-03-151-1/+3
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* /* -> /*- for license, minor formatting changesimp2005-01-076-6/+6
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* - Use the rman_get_* functions instead of reaching into struct resource.marius2004-08-112-2/+0
| | | | | | | | - Remove __RMAN_RESORUCE_VISIBLE again. It's no longer required either because of the above change or because struct rman is no longer hidden. Reviewed by: grehan Tested by: cross-compile on i386
* Catch up with __RMAN_RESOURCE_VISIBLE changegrehan2004-07-012-0/+9
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* Move soft structs back to C files to avoid exposing rman fieldsgrehan2004-07-011-7/+0
| | | | to clients now that it's protected with __RMAN_RESOURCE_VISIBLE
* Catchup to now-required <sys/module.h> for PowerPCgrehan2004-06-252-0/+2
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* Convert callers to the new bus_alloc_resource_any(9) API.njl2004-03-171-1/+1
| | | | | Submitted by: Mark Santcroos <marks@ripe.net> Reviewed by: imp, dfr, bde
* - fixed trailing whitespace and indentationgrehan2004-02-111-11/+10
| | | | - removed unused variable to fix compile warning
* - add a description of what .gdbinit should contain.grehan2004-02-041-9/+25
| | | | | | | | | - add an option for the output device in the hope that this can be made non-blocking at some stage. - define an alias for the disk device, required by dev/ofw/ofw_disk.c - shift iobus to 0x9000000 so as not to clash with the OpenFirmware entry point of 0x8000400 when address decoding. - down-tone comments about the disk dev config :-)
* Catch up with ATA UMA changesgrehan2004-01-151-0/+1
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* Make the OpenPic driver bus-independent, with attachments forgrehan2004-01-131-0/+219
| | | | | | | | | | the MacIO chip and PSIM's IOBus. Bus-specific drivers should use the identify method to attach themselves to nexus so interrupt can be allocated before the h/w is probed. The 'early attach' routine in openpic is used for this stage of boot. When h/w is probed, the openpic can be attached properly. It will enable interrupts allocated prior to this.
* Catch up with ATA changes by including <sys/sema.h>grehan2004-01-131-0/+1
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* ATAng requires <sys/taskqueue.h>grehan2003-09-221-0/+1
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* Remove reference to ata resource in print_child.grehan2003-04-181-1/+0
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* Remove sparse address hack.grehan2003-04-181-2/+0
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* Catch up with ATAng changesgrehan2003-02-241-8/+9
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* Back out M_* changes, per decision of the TRB.imp2003-02-191-1/+1
| | | | Approved by: trb
* Remove M_TRYWAIT/M_WAITOK/M_WAIT. Callers should use 0.alfred2003-01-211-1/+1
| | | | Merge M_NOWAIT/M_DONTWAIT into a single flag M_NOWAIT.
* Removed unnecessary includes and brought up to date with atagrehan2003-01-181-4/+15
| | | | common code by adding lock functions.
* Support files and a h/w tree description for the PSIM ppc simulatorgrehan2002-09-196-0/+1018
Approved by: benno
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