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* MFC r277792:nwhitehorn2015-02-031-7/+7
| | | | | | Fix bug in mapppings of multiple pages exposed by updates to the VSCSI support in QEMU. Each page of a many page mapping was getting mapped to the same physical address, which is not the desired behavior.
* MFC r272109, r272181:ian2014-10-261-21/+1
| | | | | | | | | Replace multiple nearly-identical copies of code to walk through an FDT node's interrupts=<...> property creating resource list entries with a single common implementation. This change makes ofw_bus_intr_to_rl() the one true copy of that code and removes the copies of it from other places. This also adds handling of the interrupts-extended property.
* MFC r261423, r261424, r261516, r261513, r261562, r261563, r261564, r261565,ian2014-05-154-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | r261596, r261606 Add the imx sdhci controller. Move Open Firmware device root on PowerPC, ARM, and MIPS systems to a sub-node of nexus (ofwbus) rather than direct attach under nexus. This fixes FDT on x86 and will make coexistence with ACPI on ARM systems easier. SPARC is unchanged. Add the missing ')' at end of sentence. Reword it to use a more common idiom. Pass the kernel physical address to initarm through the boot param struct. Make functions only used in vfp.c static, and remove vfp_enable. Fix __syscall on armeb EABI. As it returns a 64-bit value it needs to place 32-bit data in r1, not r0. 64-bit data is already packed correctly. Use abp_physaddr for the physical address over KERNPHYSADDR. This helps us remove the need to load the kernel at a fixed address. Remove references to PHYSADDR where it's used only in debugging output. Dynamically generate the page table. This will allow us to detect the physical address we are loaded at to change the mapping.
* MFC r261351, r261352, r261355, r261396, r261397, r261398, r261403, r261404,ian2014-05-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | r261405 Open Firmware interrupt specifiers can consist of arbitrary-length byte strings and include arbitrary information (IRQ line/domain/sense). When the ofw_bus_map_intr() API was introduced, it assumed that, as on most systems, these were either 1 cell, containing an interrupt line, or 2, containing a line number plus a sense code. It turns out a non-negligible number of ARM systems use 3 (or even 4!) cells for interrupts, so make this more general. Provide a simpler and more standards-compliant simplebus implementation to get the Routerboard 800 up and running with the vendor device tree. This does not implement some BERI-specific features (which hopefully won't be necessary soon), so move the old code to mips/beri, with a higher attach priority when built, until MIPS interrupt domain support is rearranged. Allow nesting of simplebuses. Add a set of helpers (ofw_bus_get_status() and ofw_bus_status_okay()) to process "status" properties of OF nodes. Fix one remnant endian flaw in nexus.
* MFC r258800, r258802, r258805, r258806, r258807, r258851, r258857,ian2014-05-141-5/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r259199, r259484, r259513, r259514, r259516 The kernel stack guard pages are only below the stack pointer, not above. Remove unnecessary double-setting of the thread's onfault state in copyinstr(). Open Firmware mandates that certain cross-references, in particular those in /chosen, be ihandles. The ePAPR spec makes those cross-reference phandles, since FDT has no concept of ihandles. Have the OF FDT CI module interpret queries about ihandles as cross-reference phandles. Real OF systems have an ihandle under /chosen/stdout, not a phandle. Use the right type. Rearchitect platform memory map parsing to make it less Open Firmware-centric. Remove fdtbus_bs_tag definition, which is now obsolete. The remainder of this file is also slated for future demolition. Return the correct IEEE 1275 code for "nextprop". Use the common Open Firmware PCI interrupt routing code instead of the duplicate version in dev/fdt. Configure interrupt sense based on device tree information. Simplify the ofw_bus_lookup_imap() API slightly: make it allocate maskbuf internally instead of requiring the caller to allocate it.
* MFC r258268, r258271, r258272, r258274, r258275, r258427, r258694, r258696,ian2014-05-141-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | r258697, r258757 Do not assume a value for #address-cells when parsing the OF translations map. This allows the kernel to get farther with OpenBIOS on 64-bit CPUs. Actually look up #address-cells instead of assuming it is correlated with the Uninorth version number. #interrupt-cells belongs to the iparent, not the device parent. Add a sysctl to allow disabling resetting the OF syscons. For PCI<->PCI bridges, #address-cells may be 3. Make RTAS calls, which call setfault() to recover from machine checks, preserve any existing fault buffer. badaddr() is used only in the grackle PCI driver, so move its definition there. Clean up a spurious setfault() declaration as well. This [phyp_console] driver doesn't need the /options node, so don't check for it. Use the Open Firmware-based CPU frequency determination as a generic fallback if we can't measure CPU frequency. This is also useful on a variety of embedded systems using FDT.
* MFC r257334, r257336, r257337, r257338, r257341, r257342, r257343, r257370,ian2014-05-141-3/+3
| | | | | | | r257368, r257416 Hints-only devices should return BUS_PROBE_NOWILDCARD from their probe methods.
* MFC r257162, r257175ian2014-05-131-1/+1
| | | | | | | The old trap.h (then trap_aim.h) actually had trap ID codes for Book-E CPUs. Use it universally. Book-E traps may also need revisiting due to the introduction of fixed-offset traps and the deprecation of IVORs in POWER ISA 2.06, but that's very much an issue for another day.
* MFC r256994, r257016, r257055, r257059, r257060, r257075ian2014-05-131-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add two new interfaces to ofw_bus: - ofw_bus_map_intr() Maps an (iparent, IRQ) tuple to a system-global interrupt number in some platform dependent way. This is meant to be implemented as a replacement for [FDT_]MAP_IRQ() that is an MI interface that knows about the bus hierarchy. - ofw_bus_config_intr() Configures an interrupt (previously mapped) based on firmware sense flags. This replaces manual interpretation of the sense field in bus drivers and will, in a follow-up, allow that interpretation to be redirected to the PIC drivers where it belongs. This will eventually replace the tables in /sys/dev/fdt/fdt_ARCH.c The PowerPC/AIM code has been converted to use these globally, with an implementation in terms of MAP_IRQ() and powerpc_config_intr(), assuming OpenPIC, at the bus root in nexus(4). The ofw_bus_config_intr() will shortly be integrated into pic_if.m and bounced through nexus into the PIC tree. Factor out MI portions of the PowerPC nexus device into /sys/dev/ofw. The sparc64 driver will be modified to use this shortly. Allow PIC drivers to translate firmware sense codes for themselves. This is designed to replace the tables in dev/fdt/fdt_ARCH.c, but will not happen quite yet. Do not map IRQs twice. This fixes PowerPC/FDT systems with multiple PICs, which would try to treat the previously-mapped interrupts from fdt_decode_intr() as interrupt line numbers on the same parent PIC. Remove some of the code required for supporting ssm(4) on SPARC in favor of a more PowerPC/FDT-focused design. Whenever SPARC64 is integrated into this rework, this should be (trivially) revisited.
* MFC: r258427, r258694andreast2013-12-121-11/+13
| | | | | | | | | | | | | | | | r258694: Make RTAS calls, which call setfault() to recover from machine checks, preserve any existing fault buffer. RTAS calls are meant to be safe from interrupt context (and are indeed used there to implement the xics PIC driver). Without this, calling into RTAS in interrupt context would have the effect of clearing any existing onfault state of the interrupted thread, potentially leading to a panic. r258427: For PCI<->PCI bridges, #address-cells may be 3. Allow this when parsing the ibm,dma-window properties. This is especially a concern when #ibm,dma-address-cells is not specified and we have to use the regular #address-cells property.
* MFC: r258051, r258052andreast2013-12-123-31/+116
| | | | | | | | | | | | | | r258052: Following the approach with ACPI DMAR on x86, split IOMMU handling into a variant PCI bus instead of trying to shoehorn it into the PCI host bridge adapter. Besides matching better the architecture on other platforms, this also allows systems with multiple partitionable endpoints per PCI host bridge to work correctly. r258051: Actually add IOMMU domain to the list of known mappings. This fixes a bug where multiple devices in the same IOMMU domain would be allocated conflicting mappings unless they also shared a DMA tag.
* MFC r258615andreast2013-12-111-8/+26
| | | | | | Take care to handle the full 16 byte buffer in the get/put routines. Also, skip the VTERM header once when receiving data from the hypervisor call when we have a HVTERMPROT connection.
* MFC r258503andreast2013-12-111-0/+5
| | | | Limit the large page size to 16MB for now.
* MFC r257345,257382,257388:nwhitehorn2013-12-101-14/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Implement extended LUN support. If PIM_EXTLUNS is set by a SIM, encode the upper 32-bits of the LUN, if possible, into the target_lun field as passed directly from the REPORT LUNs response. This allows extended LUN support to work for all LUNs with zeros in the lower 32-bits, which covers most addressing modes without breaking KBI. Behavior for drivers not setting PIM_EXTLUNS is unchanged. No user-facing interfaces are modified. Extended LUNs are stored with swizzled 16-bit word order so that, for devices implementing LUN addressing (like SCSI-2), the numerical representation of the LUN is identical with and without PIM_EXTLUNS. Thus setting PIM_EXTLUNS keeps most behavior, and user-facing LUN IDs, unchanged. This follows the strategy used in Solaris. A macro (CAM_EXTLUN_BYTE_SWIZZLE) is provided to transform a lun_id_t into a uint64_t ordered for the wire. This is the second part of work for full 64-bit extended LUN support and is designed to a bridge for stable/10 to the final 64-bit LUN code. The third and final part will involve widening lun_id_t to 64 bits and will not be MFCed. This third part will break the KBI but will keep the KPI unchanged so that all drivers that will care about this can be updated now and not require code changes between HEAD and stable/10. Reviewed by: scottl
* MFC r256777-256779,256788:nwhitehorn2013-10-282-0/+500
| | | | | | Add driver for POWER hypervisor interpartition ethernet. Approved by: re (glebius)
* Add driver for the PAPR VSCSI virtual SCSI controller. This lets FreeBSDnwhitehorn2013-09-282-1/+1034
| | | | | | | | | | | install directly into standard POWER LPARs, as found for example in QEMU. The core of this device is the SCSI RDMA protocol as also found in Infiniband. The SRP portions of the driver will be factored out and placed /sys/cam in the future to allow them to be used for IB storage. Thanks to Scott Long for a great deal of implementation help. Reviewed by: scottl Approved by: re (kib)
* Rework handling of ofw_quiesce(), making it the responsibility of thenwhitehorn2013-09-271-0/+3
| | | | | | | | | | platform modules. Whether to call this function or not is highly machine dependent: on some systems, it is required, while on others it breaks everything. Platform modules are in a better position to figure this out. This is required for POWER hypervisor SCSI to work correctly. There are no functional changes on Powermac systems. Approved by: re (kib)
* Make sure that ref and changed bits propagate back to the VM layernwhitehorn2013-09-271-6/+13
| | | | | | | whenever pages are unmapped. The old code had several races that could allow these to become stale. Approved by: re (kib)
* As idling the CPU no longer causes hangs on QEMU, reenable the pSeriesnwhitehorn2013-09-261-2/+0
| | | | | | cpu_idle() routine. Approved by: re (delphij)
* Fix bug where UART unit number was not set properly, which preventednwhitehorn2013-09-261-4/+1
| | | | | | | | operation on systems with multiple serial ports. Also turn on interrupts for the UART device, which were disabled due to a now-fixed bug in QEMU. Approved by: re (gjb)
* Merge in support for PAPR-compliant (Power Architecture Platformnwhitehorn2013-09-1711-0/+2840
Requirements) systems from the projects/pseries branch. This in principle includes all IBM POWER hardware released in the last 15 years with the exception of POWER3-based systems when run in 64-bit mode. The main development target, however, has been the PAPR logical partition support that is the default target in KVM on POWER and QEMU -- mileage may vary on actual hardware at present. Much of the heavy lifting here was done by Andreas Tobler. Approved by: re (kib)
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