| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Align the PCI Express #defines with the style used for the PCI-X | gavin | 2012-09-18 | 1 | -6/+6 |
| * | Support lbc interrupts: | marcel | 2012-07-03 | 2 | -34/+108 |
| * | Properly implement the bus_config_intr, bus_setup_intr and bus_teardown_intr | marcel | 2012-07-02 | 1 | -2/+58 |
| * | Import eSDHC driver for Freescale integrated controller. | raj | 2012-05-26 | 2 | -0/+1603 |
| * | Move OpenPIC FDT bus glue to a shared location, so that other PowerPC | raj | 2012-05-26 | 1 | -93/+0 |
| * | A few improvements: | marcel | 2012-05-24 | 2 | -64/+179 |
| * | Remove Semihakf-ism. DEBUG is a kernel configuration option. It | marcel | 2012-05-24 | 1 | -3/+0 |
| * | Just return if the size of the window is 0. This can happen when the | marcel | 2012-05-24 | 1 | -1/+7 |
| * | Either the I/O port range or the memory mapped I/O range may not be | marcel | 2012-05-24 | 1 | -2/+7 |
| * | Fix missing header for powerpc_iomb(). | nwhitehorn | 2012-04-23 | 1 | -0/+1 |
| * | Replace eieio; sync for creating bus-space memory barriers with sync. | nwhitehorn | 2012-04-22 | 1 | -1/+1 |
| * | - There's no need to overwrite the default device method with the default | marius | 2011-11-22 | 2 | -4/+2 |
| * | Fix r222813: we need to include sys/cpuset.h. because the PIC interface | marcel | 2011-07-31 | 1 | -2/+2 |
| * | MFC | attilio | 2011-05-29 | 2 | -12/+14 |
| |\ |
|
| | * | o Determine the number of LAWs in a way the is future proof. Only the | marcel | 2011-05-28 | 1 | -7/+14 |
| | * | Remove unused defines. They're distracting... | marcel | 2011-05-28 | 1 | -5/+0 |
| | * | Retire isa_setup_intr() and isa_teardown_intr() and use the generic bus | jhb | 2011-05-06 | 1 | -17/+0 |
| * | | Fix compilation. | attilio | 2011-05-18 | 1 | -1/+2 |
| * | | MFC | attilio | 2011-05-06 | 1 | -17/+0 |
| |/ |
|
| * | Rename INTR_VEC to MAP_IRQ. From the OFW or FDT we obtain a | marcel | 2011-02-02 | 1 | -3/+3 |
| * | Fix the interrupt code, broken 7 months ago. The interrupt framework | marcel | 2011-01-29 | 4 | -103/+40 |
| * | Have nexus behave the same as the one on ARM (marvell SoCs), so as to | marcel | 2011-01-29 | 1 | -8/+17 |
| * | Restructure how reset and poweroff are handled on PowerPC systems, since | nwhitehorn | 2010-08-31 | 1 | -25/+0 |
| * | Convert Freescale PowerPC platforms to FDT convention. | raj | 2010-07-11 | 14 | -1990/+1694 |
| * | Move the EOI logic when starting ithreads into intr_machdep instead of | nwhitehorn | 2010-07-06 | 1 | -2/+0 |
| * | Remove the unneeded header <machine/intr.h>. | marcel | 2010-07-02 | 2 | -2/+0 |
| * | Assign PCI intline values for ISA interrupts using the new INTR_VEC() | marcel | 2010-06-24 | 1 | -3/+3 |
| * | Pass the device_t of the AT PIC driver to atpic_intr() so that | marcel | 2010-06-24 | 1 | -5/+2 |
| * | With openpic(4) using active-low as the default polarity, reconfigure | marcel | 2010-06-23 | 1 | -2/+9 |
| * | Configure interrupts on SMP systems to be distributed among all online | nwhitehorn | 2010-06-23 | 1 | -0/+1 |
| * | Provide for multiple, cascaded PICs on PowerPC systems, and extend the | nwhitehorn | 2010-06-18 | 6 | -29/+58 |
| * | Fix an off-by-one bug for the number of slots on a PCI/PCI-X bus. | marcel | 2010-03-23 | 1 | -7/+8 |
| * | Add definitions for a 4th PCI host controller. No Freescale processor | marcel | 2010-03-23 | 2 | -1/+16 |
| * | Make PCI Express host controllers functional, by: | marcel | 2010-02-01 | 1 | -0/+26 |
| * | Use the capability pointer to indicate whether the host controller is | marcel | 2010-02-01 | 1 | -12/+13 |
| * | Don't check the device ID. Instead, check the class, subclass and | marcel | 2010-01-29 | 1 | -28/+13 |
| * | Always allocate PCI/ISA interrupts as shareable so that shared | marcel | 2009-11-20 | 1 | -0/+1 |
| * | Do not use OCP85XX_LBC_OFF twice when accessing LBC registers on MPC85XX. | raj | 2009-07-21 | 1 | -4/+4 |
| * | More precise description of the DS1553 driver. | raj | 2009-06-24 | 1 | -1/+1 |
| * | DS1553 RTC module driver. On the MPC8555CDS system it hangs off of the LBC bus. | raj | 2009-06-22 | 3 | -0/+435 |
| * | Integrated I2C controller driver (found in MPC85xx and other SOC parts). | raj | 2009-06-22 | 1 | -0/+440 |
| * | Initial version of the sec(4) driver for the integrated security engine found | raj | 2009-06-06 | 2 | -0/+8 |
| * | Mark the cascaded AT interrupt handler as MP safe to avoid having | marcel | 2009-05-31 | 1 | -1/+1 |
| * | Initial support for SMP on PowerPC MPC85xx. | raj | 2009-05-21 | 1 | -3/+19 |
| * | Skip interleaved RAM target on MPC85xx during renitialization of the local | raj | 2009-05-21 | 1 | -1/+2 |
| * | Add suppport for ISA and ISA interrupts to make the ATA | marcel | 2009-04-24 | 4 | -66/+514 |
| * | Make MPC85xx LAW handling and reset routines aware of the MPC8548 variant. | raj | 2009-03-13 | 3 | -15/+8 |
| * | Extend and improve MPC85XX Local Bus management. | raj | 2008-12-18 | 5 | -69/+346 |
| * | Minor clean up of BookE/MPC85XX: iprove naming and style(9). | raj | 2008-12-17 | 1 | -6/+2 |
| * | Improve MPC85XX helper routines. | raj | 2008-12-17 | 3 | -28/+65 |
