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* Unbreak the LBC driver, broken with the large RMan and 36-bit physical ↵jhibbits2016-07-051-21/+32
| | | | | | | | | | address changes. Remove the use of fdt_data_to_res(), and instead construct the resources manually. Additionally, avoid the 32-bit size limitation of fdt_data_get(), by building physical addresses manually from the lbc ranges property. Approved by: re@(gjb)
* Use OF_prop_free instead of direct call to free(9)gonzo2016-05-141-3/+3
| | | | Reviewed by: jhibbits
* sys/powerpc: make use of the howmany() macro when available.pfg2016-04-261-1/+1
| | | | | We have a howmany() macro in the <sys/param.h> header that is convenient to re-use as it makes things easier to read.
* Fix SMP booting for PowerPC Book-Ejhibbits2016-04-191-19/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: PowerPC Book-E SMP is currently broken for unknown reasons. Pull in Semihalf changes made c2012 for e500mc/e5500, which enables booting SMP. This eliminates the shared software TLB1 table, replacing it with tlb1_read_entry() function. This does not yet support ePAPR SMP booting, and doesn't handle resetting CPUs already released (ePAPR boot releases APs to a spin loop waiting on a specific address). This will be addressed in the near future by using the MPIC to reset the AP into our own alternate boot address. This does include a change to the dpaa/dtsec(4) driver, to mark the portals as CPU-private. Test Plan: Tested on Amiga X5000/20 (P5020). Boots, prints the following messages: Adding CPU 0, pir=0, awake=1 Waking up CPU 1 (dev=1) Adding CPU 1, pir=20, awake=1 SMP: AP CPU #1 launched top(1) shows CPU1 active. Obtained from: Semihalf Relnotes: Yes Differential Revision: https://reviews.freebsd.org/D5945
* Make i2c device child auto-probe work for MPC85xx and QorIQ SoCs.jhibbits2016-04-051-1/+11
| | | | | | OFW i2c probing requires a new method ofw_bus_get_node(), and the bus device is assumed iichb. With these changes, i2c devices attached in fdt are probed and attached automagically.
* Reduce OFW PCI code duplication - involves ARM, PPC and SPARC64zbb2016-03-291-2/+1
| | | | | | | | | | | | | | | | | Import portions of the PowerPC OF PCI implementation into new file "ofwpci.c", common for other platforms. The files ofw_pci.c and ofw_pci.h from sys/powerpc/ofw no longer exist. All required declarations are moved to sys/dev/ofw/ofwpci.h. This creates a new ofw_pci_write_ivar() function and modifies some others methods. Most functions contain existing ppc implementations in the majority unchanged. Now there is no need to have multiple identical copies of methods for various architectures. Requested by: jhibbits Reviewed by: jhibbits, marius Submitted by: Marcin Mazurek <mma@semihalf.com> Obtained from: Semihalf Sponsored by: Annapurna Labs Differential Revision: https://reviews.freebsd.org/D4879
* Fix fallout from r292180 (Dec 2015)... ensure that every driver which hasian2016-03-211-1/+1
| | | | | | | | | a DRIVER_MODULE() referencing mmc_driver has a MODULE_DEPEND() on mmc. This is because the kernel linker only searches for symbols in dependent modules, so loading sdhci_pci (and other bus-flavors of sdhci) would fail when mmc was not compiled into the kernel (even if you hand-loaded mmc first). (Thanks to jilles@ for providing the vital clue about the kernel linker.)
* Use uintmax_t (typedef'd to rman_res_t type) for rman ranges.jhibbits2016-03-181-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some architectures, u_long isn't large enough for resource definitions. Particularly, powerpc and arm allow 36-bit (or larger) physical addresses, but type `long' is only 32-bit. This extends rman's resources to uintmax_t. With this change, any resource can feasibly be placed anywhere in physical memory (within the constraints of the driver). Why uintmax_t and not something machine dependent, or uint64_t? Though it's possible for uintmax_t to grow, it's highly unlikely it will become 128-bit on 32-bit architectures. 64-bit architectures should have plenty of RAM to absorb the increase on resource sizes if and when this occurs, and the number of resources on memory-constrained systems should be sufficiently small as to not pose a drastic overhead. That being said, uintmax_t was chosen for source clarity. If it's specified as uint64_t, all printf()-like calls would either need casts to uintmax_t, or be littered with PRI*64 macros. Casts to uintmax_t aren't horrible, but it would also bake into the API for resource_list_print_type() either a hidden assumption that entries get cast to uintmax_t for printing, or these calls would need the PRI*64 macros. Since source code is meant to be read more often than written, I chose the clearest path of simply using uintmax_t. Tested on a PowerPC p5020-based board, which places all device resources in 0xfxxxxxxxx, and has 8GB RAM. Regression tested on qemu-system-i386 Regression tested on qemu-system-mips (malta profile) Tested PAE and devinfo on virtualbox (live CD) Special thanks to bz for his testing on ARM. Reviewed By: bz, jhb (previous) Relnotes: Yes Sponsored by: Alex Perez/Inertial Computing Differential Revision: https://reviews.freebsd.org/D4544
* Let rman_init() initialize the default rman range.jhibbits2016-03-031-2/+0
| | | | | If rm_start and rm_end are both 0 on input to rman_init(), rman_init() pre-initializes them to the default range. No need to set it before.
* Fix 2 bugs in the mpc85xx local bus controller driver.jhibbits2016-03-021-2/+26
| | | | | | | | | | 1) Include opt_platform.h to get QORIQ_DPAA. Otherwise the definition of OCP85XX_TGTIF_LBC is incorrect. 2) The child resources are already allocated, just activate them, instead of incorrectly remapping the memory regions (resource lists for lbc consist of the virtual address of the child's resources, not the physical address). Sponsored by: Alex Perez/Inertial Computing
* Add another compatibility check for QorIQ GPIO driver.jhibbits2016-03-011-1/+2
| | | | | | | | Some MPC85xx GPIO controllers are compatible with QorIQ. It may make more sense in the future to rename this and mpc85xx_gpio.c, as mpc85xx_gpio.c appears to only be compatible with a few mpc85xx SoCs. All other MPC85xx SoCs use the same controller as QorIQ.
* Move another range check to use RMAN_IS_DEFAULT_RANGE().jhibbits2016-02-271-1/+1
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* Allow the size argument for law_enable() to be non-power-of-2.jhibbits2016-02-231-1/+2
| | | | | Although the local access windows are powers of 2 in size, allow arguments that aren't power of 2, and round up.
* Revert r295756:zbb2016-02-201-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Extract common code from PowerPC's ofw_pci Import portions of the PowerPC OF PCI implementation into new file "ofw_pci.c", common for other platforms. The files ofw_pci.c and ofw_pci.h from sys/powerpc/ofw no longer exist. All required declarations are moved to sys/dev/ofw/ofw_pci.h. This creates a new ofw_pci_write_ivar() function and modifies ofw_pci_nranges(), ofw_pci_read_ivar(), ofw_pci_route_interrupt() methods. Most functions contain existing ppc implementations in the majority unchanged. Now there is no need to have multiple identical copies of methods for various architectures. Submitted by: Marcin Mazurek <mma@semihalf.com> Obtained from: Semihalf Sponsored by: Annapurna Labs Reviewed by: jhibbits, mmel Differential Revision: https://reviews.freebsd.org/D4879 This needs to return to the drawing board as it breaks both PowerPC and Sparc64 build. Pointed out by: jhibbits
* Introduce a RMAN_IS_DEFAULT_RANGE() macro, and use it.jhibbits2016-02-201-1/+1
| | | | | | | | | | | This simplifies checking for default resource range for bus_alloc_resource(), and improves readability. This is part of, and related to, the migration of rman_res_t from u_long to uintmax_t. Discussed with: jhb Suggested by: marcel
* Extract common code from PowerPC's ofw_pcizbb2016-02-181-3/+1
| | | | | | | | | | | | | | | | | | | Import portions of the PowerPC OF PCI implementation into new file "ofw_pci.c", common for other platforms. The files ofw_pci.c and ofw_pci.h from sys/powerpc/ofw no longer exist. All required declarations are moved to sys/dev/ofw/ofw_pci.h. This creates a new ofw_pci_write_ivar() function and modifies ofw_pci_nranges(), ofw_pci_read_ivar(), ofw_pci_route_interrupt() methods. Most functions contain existing ppc implementations in the majority unchanged. Now there is no need to have multiple identical copies of methods for various architectures. Submitted by: Marcin Mazurek <mma@semihalf.com> Obtained from: Semihalf Sponsored by: Annapurna Labs Reviewed by: jhibbits, mmel Differential Revision: https://reviews.freebsd.org/D4879
* Make lbc(4) the same driver pass as simplebus.jhibbits2016-02-031-1/+2
| | | | | | | | Device trees mark lbc as compatible with simplebus. Since simplebus is passed first, it attaches first. When lbc's pass (default pass) comes, the bus is already attached to simplebus, so is skipped. Sponsored by: Alex Perez/Inertial Computing
* Convert rman to use rman_res_t instead of u_longjhibbits2016-01-271-2/+2
| | | | | | | | | | | | | | | | | | | | Summary: Migrate to using the semi-opaque type rman_res_t to specify rman resources. For now, this is still compatible with u_long. This is step one in migrating rman to use uintmax_t for resources instead of u_long. Going forward, this could feasibly be used to specify architecture-specific definitions of resource ranges, rather than baking a specific integer type into the API. This change has been broken out to facilitate MFC'ing drivers back to 10 without breaking ABI. Reviewed By: jhb Sponsored by: Alex Perez/Inertial Computing Differential Revision: https://reviews.freebsd.org/D5075
* Initialize the rid for input.jhibbits2016-01-031-0/+1
| | | | | Left uninitialized, random rid causes the IRQ setup to fail, and the PCI device to not be attached.
* Add error interrupt handler for Freescale PCI errorsjhibbits2016-01-031-1/+112
| | | | | | This eliminates a 'interrupt storm' warning spam with the P5020. Obtained from: Semihalf
* Use uint32_t for LBC block size.jhibbits2016-01-011-3/+3
| | | | | | LBC block size can only be up to 4GB. The existing code already clamps it, but mixes unsigned long and uint32_t. This works on 32-bit targets, but not 64-bit, so isn't completely correct. This fixes the type confusion.
* Extend idle support for newer Book-E cores.jhibbits2016-01-012-0/+43
| | | | | | | | Newer Book-E cores (e500mc, e5500, e6500) do not support the WE bit in the MSR, and instead delegate CPU idling to the SoC. Perhaps in the future the QORIQ_DPAA option for the mpc85xx platform will become a subclass, which will eliminate most of the #ifdef's.
* Add platform support for QorIQ SoCs.jhibbits2015-12-303-12/+297
| | | | | | | | | This includes the following changes: * SMP kickoff for QorIQ (tested on P5020) * Errata fixes for some silicon revisions * Enables L2 (and L3 if available) caches Obtained from: Semihalf Sponsored by: Alex Perez/Inertial Computing
* Move the DRIVER_MODULE() statements that declare mmc(4) to be a child ofian2015-12-141-0/+1
| | | | | | the various bridge drivers out of dev/mmc.c and into the bridge drivers. Requested by: jhb (almost two years ago; better late than never)
* Add Freescale QorIQ GPIO driver.jhibbits2015-11-301-0/+309
| | | | | | Still missing interrupt support, to come later. Sponsored by: Alex Perez/Inertial Computing
* Remove a debug panic that crept into r291151jhibbits2015-11-221-1/+0
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* Modernize mpc85xx PCI hostbridge driver.jhibbits2015-11-222-138/+8
| | | | | | | | | | | | | Summary: * Take advantage of NEW_PCIB to remove a lot of setup code. * Fix some bugs related to multiple PCI bridges. There's still room for more cleanup, and still some bugs leftover, but this cleans up a lot. Test Plan: Tested on P5020 board with IDT PCIe switch. Differential Revision: https://reviews.freebsd.org/D4127
* Add support for new LAW registers in QorIQ SoCs.jhibbits2015-11-182-35/+125
| | | | | | | | | | | QorIQ SoCs (e5500 core, P5 family) have 2 BARs for local access windows, while MPC85XX, and P1/P2 families use only a single BAR register. This also adds the QORIQ_DPAA option, mutually exclusive to MPC85XX, to handle this difference. Obtained from: Semihalf Sponsored by: Alex Perez/Inertial Computing
* Use 64-bit addresses for configuring inbound and outbound address windows.jhibbits2015-11-031-8/+8
| | | | This allows using the full host and PCI ranges in the controller configuration.
* Use the correct space (PCI addresses) for the I/O and memory ranges.jhibbits2015-11-031-6/+6
| | | | PCIR_IOBASE/IOLIMIT/... all use PCI-space addresses, not host addresses.
* Use IIC_EBUSBSY and IIC_BUSERR status values consistantly across all drivers.ian2015-10-091-1/+1
| | | | | | | | | | | | Make it clearer what each one means in the comments that define them. IIC_BUSBSY was used in many places to mean two different things, either "someone else has reserved the bus so you have to wait until they're done" or "the signal level on the bus was not in the state I expected before/after issuing some command". Now IIC_BUSERR is used consistantly to refer to protocol/signaling errors, and IIC_BUSBSY refers to ownership/reservation of the bus.
* Fix freescale sdhc driver, and add it to the files list.jhibbits2015-08-271-5/+3
| | | | Also, add it to the mmc DRIVER_MODULE attachment list.
* The Freescale qoriq PCIe controller is compatible with mpc85xx.jhibbits2015-08-261-1/+4
| | | | | | | Add the compatible checks. Obtained from: Semihalf (partial) Sponsored by: Alex Perez/Inertial Computing
* Make the mpc85xx platform a kobj base class.jhibbits2015-08-222-7/+7
| | | | | | | | | | | | | | | Summary: Some systems are based around mpc85xx, but need special initialization. By making the mpc85xx platform a base class, these systems can be platform subclasses, and perform board-specific initialization in addition to the mpc85xx initialization. Test Plan: Tested on my RB800. A platform class was created, and will be committed separately. Reviewed By: nwhitehorn Differential Revision: https://reviews.freebsd.org/D3305
* Simplify the PCI bus scanning logic.jhibbits2015-08-211-14/+3
| | | | | | | | Rather than special casing on PCIC_BRIDGE || PCIC_PROCESSOR, allow all HDRTYPE_BRIDGE types. Obtained from: Semihalf Sponsored by: Alex Perez/Intertial Computing
* Remove debug printf.jhibbits2015-08-191-1/+0
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* Add a PCI bridge for the Freescale PCIe Root Complexjhibbits2015-05-112-3/+115
| | | | | | | | | | | | | | | | | | | | Summary: The Freescale PCIe Root Complex shows up as a Processor class device, PowerPC subclass, so the generic PCI code ignores it for a bridge. This adds support for it. As part of this, update the Freescale PCI hostbridge driver, to allow probing beyond the root complex, instead of only allowing "proper" PCI-PCI bridges. Reviewers: #powerpc, marcel, nwhitehorn Reviewed By: nwhitehorn Subscribers: imp Differential Revision: https://reviews.freebsd.org/D2442 Relnotes: yes
* Add a GPIO driver for the mpc85xx.jhibbits2015-04-041-0/+307
| | | | | This has only been tested on the RB800, using the RB800's FDT, and pulls the GPOUT and GPIN registers from the FDT.
* Move Open Firmware device root on PowerPC, ARM, and MIPS systems tonwhitehorn2014-02-052-2/+2
| | | | | | | | a sub-node of nexus (ofwbus) rather than direct attach under nexus. This fixes FDT on x86 and will make coexistence with ACPI on ARM systems easier. SPARC is unchanged. Reviewed by: imp, ian
* Rearchitect platform memory map parsing to make it lessnwhitehorn2013-12-011-4/+4
| | | | | | | | | | Open Firmware-centric: - Keep the static list of regions in platform.c instead of ofw_machdep.c - Move various merging and sorting operations to platform.c as well - Move apple_hacks code out of ofw_machdep.c and into platform_powermac.c, where it belongs - Move CHRP-specific dynamic-reconfiguration memory parsing into platform_chrp.c instead of pretending it is shared code
* Move CCSR discovery into the platform module, while simultaneously makingnwhitehorn2013-11-172-2/+56
| | | | | | | it more flexible about how the CCSR range is found. With this change, the stock MPC85XX will boot on a Routerboard 800. Hardware donated by: Benjamin Perrault
* Rename the "bare" platform "mpc85xx", which is what it actually is, andnwhitehorn2013-11-111-0/+356
| | | | | | | | | add actual platform probing based on PVR. Still needs a little more work: in particular, the CCRS setup should move here. Also turn "bare" into a truly bare platform that doesn't pretend to know how to do anything except get the memory map. This should also be enhanced to process the FDT reserved memory list, but that is for another day.
* Be more flexible about which compatible strings to accept. This brings upnwhitehorn2013-11-111-0/+1
| | | | the PCI Express bus on the RB800 using the firmware device tree.
* Teach nexus(4) about Open Firmware (e.g. FDT) on ARM and MIPS, retiringnwhitehorn2013-11-052-2/+2
| | | | | | | | | | | | | | | | | fdtbus in most cases. This brings ARM and MIPS more in line with existing Open Firmware platforms like sparc64 and powerpc, as well as preventing double-enumeration of the OF tree on embedded PowerPC (first through nexus, then through fdtbus). This change is also designed to simplify resource management on FDT platforms by letting there exist a platform-defined root bus resource_activate() call instead of replying on fdtbus to do the right thing through fdt_bs_tag. The OFW_BUS_MAP_INTR() and OFW_BUS_CONFIG_INTR() kobj methods are also available to implement for similar purposes. Discussed on: -arm, -mips Tested by: zbb, brooks, imp, and others MFC after: 6 weeks
* Interrelated improvements to early boot mappings:nwhitehorn2013-10-262-0/+3
| | | | | | | | | | | | | | | | - Remove explicit requirement that the SOC registers be found except as an optimization (although the MPC85XX LAW drivers still require they be found externally, which should change). - Remove magic CCSRBAR_VA value. - Allow bus_machdep.c's early-boot code to handle non 1:1 mappings and systems not in real-mode or global 1:1 maps in early boot. - Allow pmap_mapdev() on Book-E to reissue previous addresses if the area is already mapped. Additionally have it check all mappings, not just the CCSR area. This allows the console on e500 systems to actually work on systems where the boot loader was not kind enough to set up a 1:1 mapping before starting the kernel.
* Remove all the instances of '#undef DEBUG' from kernel.loos2013-10-251-2/+0
| | | | | Suggested by: rpaulo Approved by: adrian (mentor)
* Convert e500 PCI driver to use common PPC PCI bus glue. No functionalnwhitehorn2013-10-251-274/+75
| | | | changes.
* Allow PIC drivers to translate firmware sense codes for themselves. Thisnwhitehorn2013-10-241-0/+37
| | | | | is designed to replace the tables in dev/fdt/fdt_ARCH.c, but will not happen quite yet.
* Since the PS3 port was committed, the AIM nexus device works perfectly finenwhitehorn2013-10-201-201/+0
| | | | | on all PowerPC platforms, whether or not they have Open Firmware. Remove some more duplication and have there be only one nexus driver.
* Align the PCI Express #defines with the style used for the PCI-Xgavin2012-09-181-6/+6
| | | | | | | | | | | | | | | | | #defines. This also has the advantage that it makes the names more compact, iand also allows us to correct the non-uniform naming of the PCIM_LINK_* defines, making them all consistent amongst themselves. This is a mostly mechanical rename: s/PCIR_EXPRESS_/PCIER_/g s/PCIM_EXP_/PCIEM_/g s/PCIM_LINK_/PCIEM_LINK_/g When this is MFC'd, #defines will be added for the old names to assist out-of-tree drivers. Discussed with: jhb MFC after: 1 week
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