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* Convert Freescale PowerPC platforms to FDT convention.raj2010-07-111-105/+0
| | | | | | | | | | | | | | | | | | | | | | | | | The following systems are affected: - MPC8555CDS - MPC8572DS This overhaul covers the following major changes: - All integrated peripherals drivers for Freescale MPC85XX SoC, which are currently in the FreeBSD source tree are reworked and adjusted so they derive config data out of the device tree blob (instead of hard coded / tabelarized values). - This includes: LBC, PCI / PCI-Express, I2C, DS1553, OpenPIC, TSEC, SEC, QUICC, UART, CFI. - Thanks to the common FDT infrastrucutre (fdtbus, simplebus) we retire ocpbus(4) driver, which was based on hard-coded config data. Note that world for these platforms has to be built WITH_FDT. Reviewed by: imp Sponsored by: The FreeBSD Foundation
* Remove the unneeded header <machine/intr.h>.marcel2010-07-021-1/+0
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* Configure interrupts on SMP systems to be distributed among all onlinenwhitehorn2010-06-231-0/+1
| | | | | | CPUs by default, and provide a functional version of BUS_BIND_INTR(). While here, fix some potential concurrency problems in the interrupt handling code.
* Provide for multiple, cascaded PICs on PowerPC systems, and extend thenwhitehorn2010-06-181-0/+10
| | | | | | OFW interrupt map interface to also return the device's interrupt parent. MFC after: 8.1-RELEASE
* Add support for the BUS_CONFIG_INTR() method to the platform and tomarcel2008-03-071-0/+1
| | | | | openpic(4). Make use of it in ocpbus(4). On the MPC85xxCDS, IRQ0:4 are active-low.
* Add the pic_ipi method. While here, eliminate the unused openpic_ocpbus_softcmarcel2008-03-041-9/+4
| | | | struct.
* Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.raj2008-03-031-0/+99
The PQ3 is a high performance integrated communications processing system based on the e500 core, which is an embedded RISC processor that implements the 32-bit Book E definition of the PowerPC architecture. For details refer to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8555E This port was tested and successfully run on the following members of the PQ3 family: MPC8533, MPC8541, MPC8548, MPC8555. The following major integrated peripherals are supported: * On-chip peripherals bus * OpenPIC interrupt controller * UART * Ethernet (TSEC) * Host/PCI bridge * QUICC engine (SCC functionality) This commit brings the main functionality and will be followed by individual drivers that are logically separate from this base. Approved by: cognet (mentor) Obtained from: Juniper, Semihalf MFp4: e500
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