summaryrefslogtreecommitdiffstats
path: root/sys/powerpc/mpc85xx/ocpbus.c
Commit message (Expand)AuthorAgeFilesLines
* Skip interleaved RAM target on MPC85xx during renitialization of the localraj2009-05-211-1/+2
* Add suppport for ISA and ISA interrupts to make the ATAmarcel2009-04-241-16/+7
* Make MPC85xx LAW handling and reset routines aware of the MPC8548 variant.raj2009-03-131-13/+2
* Extend and improve MPC85XX Local Bus management.raj2008-12-181-30/+2
* Improve MPC85XX helper routines.raj2008-12-171-21/+5
* Assign 0xff800000-0xffffffff to the LBC controller. That's wheremarcel2008-10-251-0/+4
* Remove mfsvr():marcel2008-04-271-1/+1
* Improve handling of Local Access Windows on MPC85xx systems:raj2008-04-261-11/+28
* Obtain TSEC h/w address from the parent bus (OCP) and not rely blindly on whatraj2008-03-121-0/+9
* Don't use in32() and out32() when writing to the CCSRBAR. Themarcel2008-03-091-9/+26
* Add support for the BUS_CONFIG_INTR() method to the platform and tomarcel2008-03-071-0/+16
* o We don't have to keep track of the PIC, nor do we have to make suremarcel2008-03-051-28/+39
* Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.raj2008-03-031-0/+585
OpenPOWER on IntegriCloud