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* Use the canonical bits for wired, etc. in the PTE. This is important fornwhitehorn2013-09-091-2/+3
* Fix build with gcc. Move sf_buf_alloc()/sf_buf_free() declarationsglebius2013-09-061-0/+3
* Also align the 32-bit PowerPC stacks.nwhitehorn2013-09-051-0/+1
* Align stacks of kernel threads correctly at 16-byte boundaries rather thannwhitehorn2013-09-051-0/+1
* Newer versions of gcc define __INT64_C and __UINT64_C, so avoidimp2013-09-031-0/+2
* Refactor PowerPC hwpmc(4) driver into generic and specific. More refactoringjhibbits2013-09-031-1/+2
* Remove duplicate definition of SPR MMCR0.jhibbits2013-08-031-1/+0
* Revert r253748,253749avg2013-07-281-3/+0
* put contents of cpu.h under _KERNELavg2013-07-281-0/+3
* Fix issues with zeroing and fetching the counters, on x86 and ppc64.kib2013-07-011-0/+78
* Pad the PCPU MD struct, to satisfy an assert added with the projects/countersjhibbits2013-06-041-1/+1
* Fix the PowerPC Book-E register definitions used by the remote GDBmarcel2013-05-211-1/+17
* Rename VM_NDOMAIN into MAXMEMDOM and move it into machine/param.h inattilio2013-05-072-7/+4
* Since UMA_ZONE_PCPU zones put a constraint on sizeof(struct pcpu), declaredglebius2013-04-101-7/+1
* Fix build for AIM 64bit.kib2013-04-091-0/+2
* Merge from projects/counters: counter(9).glebius2013-04-081-0/+82
* Merge from projects/counters:glebius2013-04-081-3/+6
* Eliminate an unused #define.alc2013-02-221-5/+0
* Introduce PLATFORMMETHOD_END and use it.rpaulo2013-02-131-1/+2
* Allow this file to be used in LOCORE sections of the kernel.rpaulo2012-11-121-1/+3
* Move the prototype for savectx from cpu.h to pcb.h, as it is on othernwhitehorn2012-09-232-3/+1
* On Nintendo Wii CPUs, the mdp value will be garbage. Set it to NULLadrian2012-08-211-0/+1
* Make the wchar_t type machine dependent.andrew2012-06-242-6/+4
* Implement mechanism to export some kernel timekeeping data tokib2012-06-221-0/+41
* Reserve AT_TIMEKEEP auxv entry for providing usermode the pointer tokib2012-06-221-1/+2
* The page flag PGA_WRITEABLE is set and cleared exclusively by the pmapalc2012-06-161-0/+2
* Extract vendor specific Book-E pieces into separate files and have a commonraj2012-05-301-0/+39
* Let us manage differences of Book-E PowerPC variations i.e. vendor /raj2012-05-278-29/+138
* Provide SPR definitions for newer Book-E (E500mc, E5500, PPC465).raj2012-05-261-0/+36
* Unify SPR defines formatting, no funtional changes.raj2012-05-261-88/+87
* Update HID defines for E500mc and E5500 CPU cores.raj2012-05-251-0/+53
* Add a missing " to get closer to compiling.bz2012-05-241-1/+1
* Atomic operation acquire barriers also need to be isync on 64-bit systems.nwhitehorn2012-05-241-1/+1
* Revert isync for ILP32 to sync as per my original change that I discussedmarcel2012-05-241-4/+4
* MFp4 bz_ipv6_fast:bz2012-05-241-0/+4
* Fix physical address type to vm_paddr_t.raj2012-05-241-4/+4
* Fix the memory barriers for CPUs that do not like lwsync and wedge or causemarcel2012-05-241-12/+22
* Replace the list of PVOs owned by each PMAP with an RB tree. This simplifiesnwhitehorn2012-05-201-2/+5
* Fix final bugs in memory barriers on PowerPC:nwhitehorn2012-05-042-6/+6
* Add a convenience macro for the returns_twice attribute, and apply it todim2012-04-291-1/+1
* Switch the default I/O memory barrier to eieio, as it should be. Thisnwhitehorn2012-04-241-5/+1
* Fix copy-and-paste error in r230400.nwhitehorn2012-04-231-1/+1
* Provide a clearer split between read/write and acquire/release barriers.nwhitehorn2012-04-221-19/+24
* Correctly specify assembler constrains for synchronization instructions.nwhitehorn2012-04-221-3/+3
* Clarify what we are doing in r234583 a little better: eieio and isync donwhitehorn2012-04-221-15/+23
* On non-64-bit systems (which generally don't have lwsync), use eieio andnwhitehorn2012-04-221-0/+5
* Use lwsync to provide memory barriers on systems that support it insteadnwhitehorn2012-04-221-20/+18
* Remove dead code. The routines in atomic.S did not work properly anyway, andnwhitehorn2012-04-221-10/+0
* Replace eieio; sync for creating bus-space memory barriers with sync.nwhitehorn2012-04-221-24/+30
* Organize some members of ucontext_t in the same order they are in thenwhitehorn2012-04-211-3/+3
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