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* MFC r258002, r258024, r258027, r258051, r258052, r258243, r258244, r258002,ian2014-05-141-2/+0
* MFC r259284,r259287jhibbits2014-01-151-1/+2
* Pad the PCPU MD struct, to satisfy an assert added with the projects/countersjhibbits2013-06-041-1/+1
* Since UMA_ZONE_PCPU zones put a constraint on sizeof(struct pcpu), declaredglebius2013-04-101-7/+1
* Merge from projects/counters:glebius2013-04-081-3/+6
* Let us manage differences of Book-E PowerPC variations i.e. vendor /raj2012-05-271-1/+1
* Rework SLB trap handling so that double-faults into an SLB trap handler arenwhitehorn2012-01-151-1/+3
* Use a global __pure2 function instead of a global register variable fornwhitehorn2011-11-171-4/+11
* Use the ABI-mandated thread pointer register (r2 for ppc32, r13 for ppc64)nwhitehorn2011-06-231-0/+8
* Split the SLB mirror cache into two kinds of object, one for kernel mapsnwhitehorn2010-09-161-1/+1
* MFppc64:nwhitehorn2010-07-131-12/+24
* Add SMP support on U3-based G5 systems. This does not yet work perfectly:nwhitehorn2009-10-231-2/+2
* Initial support for SMP on PowerPC MPC85xx.raj2009-05-211-0/+2
* Add Altivec support for supported CPUs. This is derived from the FPU supportnwhitehorn2009-02-201-0/+1
* Rework BookE pmap towards multi-core support.raj2009-01-131-1/+2
* Export 'struct pcpu' to userland w/o requiring _KERNEL. A few portsjhb2008-08-191-1/+2
* MFp4: SMP supportmarcel2008-04-271-5/+10
* Add a catch-all for PCPU_MD_FIELDS. While we expect this to bemarcel2008-03-061-0/+7
* Unify and generalize PowerPC headers, adjust AIM code accordingly.raj2008-03-021-4/+55
* Rework the PCPU_* (MD) interface:attilio2007-06-041-1/+2
* Push down the implementation of PCPU_LAZY_INC() into the machine-dependentalc2007-03-111-0/+6
* Gratuitous namechange to avoid low-level association with ddb.grehan2004-07-121-1/+1
* Move temporary register save area from exception-vector memory togrehan2004-02-041-3/+15
* FPU support.benno2002-05-131-1/+2
* Commit of stuff that's been sitting in my tree for a while.benno2002-04-291-1/+4
* Overhaul the per-CPU support a bit:jhb2001-12-111-35/+12
* The interrupt nesting level is per-thread not per-CPU on FreeBSD.jhb2001-11-141-1/+0
* - If we ever do the per-cpu KTR stuff, the index won't be volatile as itjhb2001-09-181-10/+10
* - Fix a missed idleproc -> idlethread conversion.jhb2001-09-181-2/+1
* KSE Milestone 2julian2001-09-121-9/+10
* style(9) and make consistent across platformsobrien2001-08-161-14/+13
* Axe unused and invalid astpending globaldata member.jhb2001-08-041-1/+0
* This commit (along with one pending in sys/dev/ofw and one in sys/conf) givebenno2001-06-161-4/+6
* Overhaul of the SMP code. Several portions of the SMP kernel support havejhb2001-04-271-7/+0
* Rework the witness code to work with sx locks as well as mutexes.jhb2001-03-281-1/+1
* - Make astpending and need_resched process attributes rather than CPUjhb2001-02-101-1/+0
* - Rename the gd_cpuno member of struct globaldata to gd_cpuid.jhb2001-01-241-4/+6
* Make intr_nesting_level per-process, rather than per-cpu. Setupjake2001-01-211-1/+0
* Remove unused per-cpu variables inside_intr and ss_eflags.jake2001-01-121-1/+0
* Store in globaldata our CPU ID#. Provide a lock for panics - only onemjacob2000-12-091-0/+1
* Add the 'witness_spin_check' per-CPU variable.jhb2000-11-151-0/+1
* Major update to the way synchronization is done in the kernel. Highlightsjasone2000-09-071-0/+79
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