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* Add memmove() to the kernel, making the kernel compile with Clang.ed2009-02-281-1/+0
| | | | | | | | | | | | When copying big structures, LLVM generates calls to memmove(), because it may not be able to figure out whether structures overlap. This caused linker errors to occur. memmove() is now implemented using bcopy(). Ideally it would be the other way around, but that can be solved in the future. On ARM we don't do add anything, because it already has memmove(). Discussed on: arch@ Reviewed by: rdivacky
* Prefer register usage style to be more consistent with the rest of theraj2009-02-271-8/+8
| | | | trap_subr.S code.
* Make Book-E debug register state part of the PCB context.raj2009-02-274-5/+14
| | | | | | | | | | | | | | | | Previously, DBCR0 flags were set "globally", but this leads to problems because Book-E fine grained debug settings work only in conjuction with the debug master enable bit in MSR: in scenarios when the DBCR0 was set with intention to debug one process, but another one with MSR[DE] set got scheduled, the latter would immediately cause debug exceptions to occur upon execution of its own code instructions (and not the one intended for debugging). To avoid such problems and properly handle debugging context, DBCR0 state should be managed individually per process. Submitted by: Grzegorz Bernacki gjb ! semihalf dot com Reviewed by: marcel
* Clean up BookE low-level exceptions code.raj2009-01-131-46/+49
| | | | | | Improve comments, fix style(9) and typos, unify separators. Obtained from: Freescale, Semihalf
* Clean up BookE pmap.raj2009-01-131-137/+90
| | | | | | | Improve comments, eliminate redundant debug output, fix style(9) and other minor tweaks for code readability. Obtained from: Freescale, Semihalf
* Rework BookE pmap towards multi-core support.raj2009-01-135-725/+434
| | | | | | | | | | | | | | | | | | | | | | | o Eliminate tlb0[] (a s/w copy of TLB0) - The table contents cannot be maintained reliably in multiple MMU environments, where asynchronous events (invalidations from other cores) can change our local TLB0 contents underneath. - Simplify and optimize TLB flushing: system wide invalidations are performed using tlbivax instruction (propagates to other cores), for local MMU invalidations a new optimized routine (assembly) is introduced. o Improve and simplify TID allocation and management. - Let each core keep track of its TID allocations. - Simplify TID recycling, eliminate dead code. - Drop the now unused powerpc/booke/support.S file. o Improve page tables management logic. o Simplify TLB1 manipulation routines. o Other improvements and polishing. Obtained from: Freescale, Semihalf
* Modularize the Open Firmware client interface to allow run-time switchingnwhitehorn2008-12-201-1/+0
| | | | | | | | | | | | of OFW access semantics, in order to allow future support for real-mode OF access and flattened device frees. OF client interface modules are implemented using KOBJ, in a similar way to the PPC PMAP modules. Because we need Open Firmware to be available before mutexes can be used on sparc64, changes are also included to allow KOBJ to be used very early in the boot process by only using the mutex once we know it has been initialized. Reviewed by: marius, grehan
* Minor spelling fix in E500 locore.raj2008-12-181-1/+1
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* Fix E500 cache invalidation routines.raj2008-12-171-0/+6
| | | | | | | When invalidating the i/d-cache we need to wait until the core complex is really finished with the operation. Obtained from: Semihalf
* Rework E500 locore.raj2008-12-171-213/+229
| | | | | | | | | | | | | | - split bootstrap code into more modular routines, which will also be used for the non-booting cores - clean up registers usage - improve comments to better reflect reality - eliminate dead or redundant code - other minor fixes This refactoring is a preliminary step before importing dual-core (MPC8572) support. Obtained from: Freescale, Semihalf
* Minor clean up of BookE/MPC85XX: iprove naming and style(9).raj2008-12-172-25/+29
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* Add support for kernel profiling for both AIM and BookE.marcel2008-10-271-1/+4
| | | | Obtained from: Juniper Networks, Inc (BookE support).
* Remove unused declarations (interrupt_vector_{base|top}).marcel2008-10-271-3/+0
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* In mmu_booke_mapdev(), handle mappings that cannot be representedmarcel2008-10-251-5/+16
| | | | | by a single TLB entry. The boot ROM on the MPC85555CDS is 8MB, for example, and in order to map that we need 2 4MB TLB entries.
* Allow the cacheline size on PowerPC to be set at runtime. This is essential fornwhitehorn2008-09-241-2/+3
| | | | | supporting 64-bit CPUs, which often have 128-byte cache lines instead of the standard 32.
* Move initialization of tlb0, ptbl_bufs and kernel_pdir regions after we areraj2008-08-281-6/+14
| | | | | | | 100% sure that TLB1 mapping covers for them; previously we could lock the CPU with an untranslated references. Obtained from: Semihalf
* Improve kernel stack handling on e500.raj2008-08-263-24/+56
| | | | | | | | | | - Allocate thread0.td_kstack in pmap_bootstrap(), provide guard page - Switch to thread0.td_kstack as soon as possible i.e. right after return from e500_init() and before mi_startup() happens - Clean up temp stack area - Other minor cosmetics in machdep.c Obtained from: Semihalf
* Fix a typo in a comment.wkoszek2008-06-111-1/+1
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* The VM system no longer uses setPQL2(). Remove it and its helpers.alc2008-05-231-8/+0
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* Retire pmap_addr_hint(). It is no longer used.alc2008-05-181-10/+0
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* MFp4: SMP supportmarcel2008-04-271-2/+2
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* Eliminate track_modified_needed(), better known as pmap_track_modified()marcel2008-04-271-37/+8
| | | | | | | on other platforms. We no longer need it because we do not create managed mappings within the clean submap. Pointed out by: alc
* Introduce a dedicated file for MPC85xx-specific routines. Move cpu_reset()raj2008-04-261-17/+1
| | | | | there, as it's not relevant to Book-E specification, but is an implementation detail, directly dependent on the given SoC version.
* - Add an integer argument to idle to indicate how likely we are to wakejeff2008-04-251-1/+8
| | | | | | | | | | | | | | | from idle over the next tick. - Add a new MD routine, cpu_wake_idle() to wakeup idle threads who are suspended in cpu specific states. This function can fail and cause the scheduler to fall back to another mechanism (ipi). - Implement support for mwait in cpu_idle() on i386/amd64 machines that support it. mwait is a higher performance way to synchronize cpus as compared to hlt & ipis. - Allow selecting the idle routine by name via sysctl machdep.idle. This replaces machdep.cpu_idle_hlt. Only idle routines supported by the current machine are permitted. Sponsored by: Nokia
* Now that all platforms use genclock, shuffle things around slightlyphk2008-04-221-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | for better structure. Much of this is related to <sys/clock.h>, which should really have been called <sys/calendar.h>, but unless and until we need the name, the repocopy can wait. In general the kernel does not know about minutes, hours, days, timezones, daylight savings time, leap-years and such. All that is theoretically a matter for userland only. Parts of kernel code does however care: badly designed filesystems store timestamps in local time and RTC chips almost universally track time in a YY-MM-DD HH:MM:SS format, and sometimes in local timezone instead of UTC. For this we have <sys/clock.h> <sys/time.h> on the other hand, deals with time_t, timeval, timespec and so on. These know only seconds and fractions thereof. Move inittodr() and resettodr() prototypes to <sys/time.h>. Retain the names as it is one of the few surviving PDP/VAX references. Move startrtclock() to <machine/clock.h> on relevant platforms, it is a MD call between machdep.c/clock.c. Remove references to it elsewhere. Remove a lot of unnecessary <sys/clock.h> includes. Move the machdep.disable_rtc_set sysctl to subr_rtc.c where it belongs. XXX: should be kern.disable_rtc_set really, it's not MD.
* Get rid of an empty RTC implementation and hook up genclock instead.phk2008-04-131-44/+0
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* The "free-lance" timer in the i8254 is only used for the speakerphk2008-03-261-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | these days, so de-generalize the acquire_timer/release_timer api to just deal with speakers. The new (optional) MD functions are: timer_spkr_acquire() timer_spkr_release() and timer_spkr_setfreq() the last of which configures the timer to generate a tone of a given frequency, in Hz instead of 1/1193182th of seconds. Drop entirely timer2 on pc98, it is not used anywhere at all. Move sysbeep() to kern/tty_cons.c and use the timer_spkr*() if they exist, and do nothing otherwise. Remove prototypes and empty acquire-/release-timer() and sysbeep() functions from the non-beeping archs. This eliminate the need for the speaker driver to know about i8254frequency at all. In theory this makes the speaker driver MI, contingent on the timer_spkr_*() functions existing but the driver does not know this yet and still attaches to the ISA bus. Syscons is more tricky, in one function, sc_tone(), it knows the hz and things are just fine. In the other function, sc_bell() it seems to get the period from the KDMKTONE ioctl in terms if 1/1193182th second, so we hardcode the 1193182 and leave it at that. It's probably not important. Change a few other sysbeep() uses which obviously knew that the argument was in terms of i8254 frequency, and leave alone those that look like people thought sysbeep() took frequency in hertz. This eliminates the knowledge of i8254_freq from all but the actual clock.c code and the prof_machdep.c on amd64 and i386, where I think it would be smart to ask for help from the timecounters anyway [TBD].
* In keeping with style(9)'s recommendations on macros, use a ';'rwatson2008-03-162-2/+2
| | | | | | | | | after each SYSINIT() macro invocation. This makes a number of lightweight C parsers much happier with the FreeBSD kernel source, including cflow's prcc and lxr. MFC after: 1 month Discussed with: imp, rink
* Obtain TSEC h/w address from the parent bus (OCP) and not rely blindly on whatraj2008-03-121-1/+24
| | | | | | | | | | | | might be currently programmed into the registers. Underlying firmware (U-Boot) would typically program MAC address into the first unit only, and others are left uninitialized. It is now possible to retrieve and program MAC address for all units properly, provided they were passed on in the bootinfo metadata. Reviewed by: imp, marcel Approved by: cognet (mentor)
* Remove kernel support for M:N threading.jeff2008-03-122-6/+1
| | | | | | | | While the KSE project was quite successful in bringing threading to FreeBSD, the M:N approach taken by the kse library was never developed to its full potential. Backwards compatibility will be provided via libmap.conf for dynamically linked binaries and static binaries will be broken.
* Enable the D-cache and I-cache when not already enabled.marcel2008-03-081-3/+28
| | | | | | | | | It so happens that U-Boot disables the D-cache when booting an ELF image, so this change makes sure we run with the D-cache enabled from now on. It shows too... While here, remove the duplicate definition of the hw.model sysctl.
* Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.raj2008-03-0312-0/+7710
The PQ3 is a high performance integrated communications processing system based on the e500 core, which is an embedded RISC processor that implements the 32-bit Book E definition of the PowerPC architecture. For details refer to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8555E This port was tested and successfully run on the following members of the PQ3 family: MPC8533, MPC8541, MPC8548, MPC8555. The following major integrated peripherals are supported: * On-chip peripherals bus * OpenPIC interrupt controller * UART * Ethernet (TSEC) * Host/PCI bridge * QUICC engine (SCC functionality) This commit brings the main functionality and will be followed by individual drivers that are logically separate from this base. Approved by: cognet (mentor) Obtained from: Juniper, Semihalf MFp4: e500
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