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* Introduce inheritance into the PowerPC MMU kobj interface.grehan2010-09-151-6/+1
| | | | | | | | | | | | | | | | | include/mmuvar.h - Change the MMU_DEF macro to also create the class definition as well as define the DATA_SET. Add a macro, MMU_DEF_INHERIT, which has an extra parameter specifying the MMU class to inherit methods from. Update the comments at the start of the header file to describe the new macros. booke/pmap.c aim/mmu_oea.c aim/mmu_oea64.c - Collapse mmu_def_t declaration into updated MMU_DEF macro The MMU_DEF_INHERIT macro will be used in the PS3 MMU implementation to allow it to inherit the stock powerpc64 MMU methods. Reviewed by: nwhitehorn
* Refactor timer management code with priority to one-shot operation mode.mav2010-09-131-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The main goal of this is to generate timer interrupts only when there is some work to do. When CPU is busy interrupts are generating at full rate of hz + stathz to fullfill scheduler and timekeeping requirements. But when CPU is idle, only minimum set of interrupts (down to 8 interrupts per second per CPU now), needed to handle scheduled callouts is executed. This allows significantly increase idle CPU sleep time, increasing effect of static power-saving technologies. Also it should reduce host CPU load on virtualized systems, when guest system is idle. There is set of tunables, also available as writable sysctls, allowing to control wanted event timer subsystem behavior: kern.eventtimer.timer - allows to choose event timer hardware to use. On x86 there is up to 4 different kinds of timers. Depending on whether chosen timer is per-CPU, behavior of other options slightly differs. kern.eventtimer.periodic - allows to choose periodic and one-shot operation mode. In periodic mode, current timer hardware taken as the only source of time for time events. This mode is quite alike to previous kernel behavior. One-shot mode instead uses currently selected time counter hardware to schedule all needed events one by one and program timer to generate interrupt exactly in specified time. Default value depends of chosen timer capabilities, but one-shot mode is preferred, until other is forced by user or hardware. kern.eventtimer.singlemul - in periodic mode specifies how much times higher timer frequency should be, to not strictly alias hardclock() and statclock() events. Default values are 2 and 4, but could be reduced to 1 if extra interrupts are unwanted. kern.eventtimer.idletick - makes each CPU to receive every timer interrupt independently of whether they busy or not. By default this options is disabled. If chosen timer is per-CPU and runs in periodic mode, this option has no effect - all interrupts are generating. As soon as this patch modifies cpu_idle() on some platforms, I have also refactored one on x86. Now it makes use of MONITOR/MWAIT instrunctions (if supported) under high sleep/wakeup rate, as fast alternative to other methods. It allows SMP scheduler to wake up sleeping CPUs much faster without using IPI, significantly increasing performance on some highly task-switching loads. Tested by: many (on i386, amd64, sparc64 and powerc) H/W donated by: Gheorghe Ardelean Sponsored by: iXsystems, Inc.
* Update PowerPC event timer code to use new event timers infrastructure.mav2010-09-113-53/+126
| | | | | | Reviewed by: nwitehorn Tested by: andreast H/W donated by: Gheorghe Ardelean
* Restructure how reset and poweroff are handled on PowerPC systems, sincenwhitehorn2010-08-311-0/+31
| | | | | | | | | | | | | | | | | the existing code was very platform specific, and broken for SMP systems trying to reboot from KDB. - Add a new PLATFORM_RESET() method to the platform KOBJ interface, and migrate existing reset functions into platform modules. - Modify the OF_reboot() routine to submit the request by hand to avoid the IPIs involved in the regular openfirmware() routine. This fixes reboot from KDB on SMP machines. - Move non-KDB reset and poweroff functions on the Powermac platform into the relevant power control drivers (cuda, pmu, smu), instead of using them through the Open Firmware backdoor. - Rename platform_chrp to platform_powermac since it has become increasingly Powermac specific. When we gain support for IBM systems, we will grow a new platform_chrp.
* Remove unused KTRACE includes.jhb2010-08-191-4/+0
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* Eliminate FDT_IMMR_VA define.raj2010-07-191-1/+1
| | | | | This removes platform dependencies from <machine>/fdt.h for the benfit of portability.
* MFppc64:nwhitehorn2010-07-134-4/+2
| | | | | | | Kernel sources for 64-bit PowerPC, along with build-system changes to keep 32-bit kernels compiling (build system changes for 64-bit kernels are coming later). Existing 32-bit PowerPC kernel configurations must be updated after this change to specify their architecture.
* Unify ABI-related bits of the Book-E and AIM machdep routinesnwhitehorn2010-07-122-475/+1
| | | | | | | | (exec_setregs, etc.) in order to simplify the addition of 64-bit support, and possible future extension of the Book-E code to handle hard floating point and Altivec. MFC after: 1 month
* Convert Freescale PowerPC platforms to FDT convention.raj2010-07-114-101/+81
| | | | | | | | | | | | | | | | | | | | | | | | | The following systems are affected: - MPC8555CDS - MPC8572DS This overhaul covers the following major changes: - All integrated peripherals drivers for Freescale MPC85XX SoC, which are currently in the FreeBSD source tree are reworked and adjusted so they derive config data out of the device tree blob (instead of hard coded / tabelarized values). - This includes: LBC, PCI / PCI-Express, I2C, DS1553, OpenPIC, TSEC, SEC, QUICC, UART, CFI. - Thanks to the common FDT infrastrucutre (fdtbus, simplebus) we retire ocpbus(4) driver, which was based on hard-coded config data. Note that world for these platforms has to be built WITH_FDT. Reviewed by: imp Sponsored by: The FreeBSD Foundation
* Replace the existing PowerPC busdma implementation with the one fromnwhitehorn2010-07-081-2/+0
| | | | | amd64 (with slight modifications). This provides support for bounce buffers, which are required on systems with RAM above 4 GB.
* Remove the unneeded header <machine/intr.h>.marcel2010-07-021-1/+0
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* Move prototypes for kern_sigtimedwait() and kern_sigprocmask() tojhb2010-06-301-0/+1
| | | | <sys/syscallsubr.h> where all other kern_<syscall> prototypes live.
* Remove debugging printf() -- that is, I assume it was for debugging :-)marcel2010-06-241-2/+0
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* Provide for multiple, cascaded PICs on PowerPC systems, and extend thenwhitehorn2010-06-181-1/+1
| | | | | | OFW interrupt map interface to also return the device's interrupt parent. MFC after: 8.1-RELEASE
* Relax one of the new assertions in pmap_enter() a little. Specifically,alc2010-06-111-1/+2
| | | | | | allow pmap_enter() to be performed on an unmanaged page that doesn't have VPO_BUSY set. Having VPO_BUSY set really only matters for managed pages. (See, for example, pmap_remove_write().)
* Reduce the scope of the page queues lock and the number ofalc2010-06-101-17/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PG_REFERENCED changes in vm_pageout_object_deactivate_pages(). Simplify this function's inner loop using TAILQ_FOREACH(), and shorten some of its overly long lines. Update a stale comment. Assert that PG_REFERENCED may be cleared only if the object containing the page is locked. Add a comment documenting this. Assert that a caller to vm_page_requeue() holds the page queues lock, and assert that the page is on a page queue. Push down the page queues lock into pmap_ts_referenced() and pmap_page_exists_quick(). (As of now, there are no longer any pmap functions that expect to be called with the page queues lock held.) Neither pmap_ts_referenced() nor pmap_page_exists_quick() should ever be passed an unmanaged page. Assert this rather than returning "0" and "FALSE" respectively. ARM: Simplify pmap_page_exists_quick() by switching to TAILQ_FOREACH(). Push down the page queues lock inside of pmap_clearbit(), simplifying pmap_clear_modify(), pmap_clear_reference(), and pmap_remove_write(). Additionally, this allows for avoiding the acquisition of the page queues lock in some cases. PowerPC/AIM: moea*_page_exits_quick() and moea*_page_wired_mappings() will never be called before pmap initialization is complete. Therefore, the check for moea_initialized can be eliminated. Push down the page queues lock inside of moea*_clear_bit(), simplifying moea*_clear_modify() and moea*_clear_reference(). The last parameter to moea*_clear_bit() is never used. Eliminate it. PowerPC/BookE: Simplify mmu_booke_page_exists_quick()'s control flow. Reviewed by: kib@
* Don't set PG_WRITEABLE in pmap_enter() unless the page is managed.alc2010-06-051-2/+4
| | | | Correct a typo in a nearby comment on sparc64.
* In the case that mmu_booke_enter_locked() is changing the attributes of aalc2010-06-011-1/+1
| | | | | | | | | mapping but not changing the physical page being mapped, the wrong flags were being inspected in order to determine whether or not to flush the instruction cache. The effect of looking at the wrong flags was that the instruction cache was never being flushed. Reviewed by: marcel
* Push down page queues lock acquisition in pmap_enter_object() andalc2010-05-261-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pmap_is_referenced(). Eliminate the corresponding page queues lock acquisitions from vm_map_pmap_enter() and mincore(), respectively. In mincore(), this allows some additional cases to complete without ever acquiring the page queues lock. Assert that the page is managed in pmap_is_referenced(). On powerpc/aim, push down the page queues lock acquisition from moea*_is_modified() and moea*_is_referenced() into moea*_query_bit(). Again, this will allow some additional cases to complete without ever acquiring the page queues lock. Reorder a few statements in vm_page_dontneed() so that a race can't lead to an old reference persisting. This scenario is described in detail by a comment. Correct a spelling error in vm_page_dontneed(). Assert that the object is locked in vm_page_clear_dirty(), and restrict the page queues lock assertion to just those cases in which the page is currently writeable. Add object locking to vnode_pager_generic_putpages(). This was the one and only place where vm_page_clear_dirty() was being called without the object being locked. Eliminate an unnecessary vm_page_lock() around vnode_pager_setsize()'s call to vm_page_clear_dirty(). Change vnode_pager_generic_putpages() to the modern-style of function definition. Also, change the name of one of the parameters to follow virtual memory system naming conventions. Reviewed by: kib
* Roughly half of a typical pmap_mincore() implementation is machine-alc2010-05-241-32/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | independent code. Move this code into mincore(), and eliminate the page queues lock from pmap_mincore(). Push down the page queues lock into pmap_clear_modify(), pmap_clear_reference(), and pmap_is_modified(). Assert that these functions are never passed an unmanaged page. Eliminate an inaccurate comment from powerpc/powerpc/mmu_if.m: Contrary to what the comment says, pmap_mincore() is not simply an optimization. Without a complete pmap_mincore() implementation, mincore() cannot return either MINCORE_MODIFIED or MINCORE_REFERENCED because only the pmap can provide this information. Eliminate the page queues lock from vfs_setdirty_locked_object(), vm_pageout_clean(), vm_object_page_collect_flush(), and vm_object_page_clean(). Generally speaking, these are all accesses to the page's dirty field, which are synchronized by the containing vm object's lock. Reduce the scope of the page queues lock in vm_object_madvise() and vm_page_dontneed(). Reviewed by: kib (an earlier version)
* Reorganize syscall entry and leave handling.kib2010-05-231-85/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extend struct sysvec with three new elements: sv_fetch_syscall_args - the method to fetch syscall arguments from usermode into struct syscall_args. The structure is machine-depended (this might be reconsidered after all architectures are converted). sv_set_syscall_retval - the method to set a return value for usermode from the syscall. It is a generalization of cpu_set_syscall_retval(9) to allow ABIs to override the way to set a return value. sv_syscallnames - the table of syscall names. Use sv_set_syscall_retval in kern_sigsuspend() instead of hardcoding the call to cpu_set_syscall_retval(). The new functions syscallenter(9) and syscallret(9) are provided that use sv_*syscall* pointers and contain the common repeated code from the syscall() implementations for the architecture-specific syscall trap handlers. Syscallenter() fetches arguments, calls syscall implementation from ABI sysent table, and set up return frame. The end of syscall bookkeeping is done by syscallret(). Take advantage of single place for MI syscall handling code and implement ptrace_lwpinfo pl_flags PL_FLAG_SCE, PL_FLAG_SCX and PL_FLAG_EXEC. The SCE and SCX flags notify the debugger that the thread is stopped at syscall entry or return point respectively. The EXEC flag augments SCX and notifies debugger that the process address space was changed by one of exec(2)-family syscalls. The i386, amd64, sparc64, sun4v, powerpc and ia64 syscall()s are changed to use syscallenter()/syscallret(). MIPS and arm are not converted and use the mostly unchanged syscall() implementation. Reviewed by: jhb, marcel, marius, nwhitehorn, stas Tested by: marcel (ia64), marius (sparc64), nwhitehorn (powerpc), stas (mips) MFC after: 1 month
* On entry to pmap_enter(), assert that the page is busy. While I'malc2010-05-161-1/+12
| | | | | | | | | | | | | | | | | | | | here, make the style of assertion used by pmap_enter() consistent across all architectures. On entry to pmap_remove_write(), assert that the page is neither unmanaged nor fictitious, since we cannot remove write access to either kind of page. With the push down of the page queues lock, pmap_remove_write() cannot condition its behavior on the state of the PG_WRITEABLE flag if the page is busy. Assert that the object containing the page is locked. This allows us to know that the page will neither become busy nor will PG_WRITEABLE be set on it while pmap_remove_write() is running. Correct a long-standing bug in vm_page_cowsetup(). We cannot possibly do copy-on-write-based zero-copy transmit on unmanaged or fictitious pages, so don't even try. Previously, the call to pmap_remove_write() would have failed silently.
* Push down the page queues into vm_page_cache(), vm_page_try_to_cache(), andalc2010-05-081-7/+8
| | | | | | | | | | | vm_page_try_to_free(). Consequently, push down the page queues lock into pmap_enter_quick(), pmap_page_wired_mapped(), pmap_remove_all(), and pmap_remove_write(). Push down the page queues lock into Xen's pmap_page_is_mapped(). (I overlooked the Xen pmap in r207702.) Switch to a per-processor counter for the total number of pages cached.
* MFamd64/i386 r207205alc2010-04-301-13/+3
| | | | | | | | | | | | | | Clearing a page table entry's accessed bit and setting the page's PG_REFERENCED flag in pmap_protect() can't really be justified, so don't do it. Additionally, two changes that make this pmap behave like the others do: Change pmap_protect() such that it calls vm_page_dirty() only if the page is managed. Change pmap_remove_write() such that it doesn't clear a page table entry's accessed bit.
* On Alan's advice, rather than do a wholesale conversion on a singlekmacy2010-04-301-4/+7
| | | | | | | | | | | | architecture from page queue lock to a hashed array of page locks (based on a patch by Jeff Roberson), I've implemented page lock support in the MI code and have only moved vm_page's hold_count out from under page queue mutex to page lock. This changes pmap_extract_and_hold on all pmaps. Supported by: Bitgravity Inc. Discussed with: alc, jeffr, and kib
* Resurrect pmap_is_referenced() and use it in mincore(). Essentially,alc2010-04-241-0/+29
| | | | | | | | | | | | | | | | | pmap_ts_referenced() is not always appropriate for checking whether or not pages have been referenced because it clears any reference bits that it encounters. For example, in mincore(), clearing the reference bits has two negative consequences. First, it throws off the activity count calculations performed by the page daemon. Specifically, a page on which mincore() has called pmap_ts_referenced() looks less active to the page daemon than it should. Consequently, the page could be deactivated prematurely by the page daemon. Arguably, this problem could be fixed by having mincore() duplicate the activity count calculation on the page. However, there is a second problem for which that is not a solution. In order to clear a reference on a 4KB page, it may be necessary to demote a 2/4MB page mapping. Thus, a mincore() by one process can have the side effect of demoting a superpage mapping within another process!
* Change the arguments of exec_setregs() so that it receives a pointernwhitehorn2010-03-251-2/+2
| | | | | | | | to the image_params struct instead of several members of that struct individually. This makes it easier to expand its arguments in the future without touching all platforms. Reviewed by: jhb
* Enable power management for E500 cores. Use "doze" for now to makemarcel2010-03-232-12/+6
| | | | | | | | sure the caches remain coherent. For single-core configurations and with busdma changes we could eventually switch to "nap" and force a D-cache invalidation as part of the DMA completion. To this end, clear PSL_WE until after we handled the decrementer or external interrupt as it tells us whether we just woke up or not.
* Actually pass a pointer to the trapframe to powerpc_extr_interrupt().marcel2010-03-231-0/+1
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* Place interrupt handling in a critical section and remove doublenwhitehorn2010-03-091-4/+4
| | | | | | | | | | | counting in incrementing the interrupt nesting level. This fixes a number of bugs in which the interrupt thread could be preempted by an IPI, indefinitely delaying acknowledgement of the interrupt to the PIC, causing interrupt starvation and hangs. Reported by: linimon Reviewed by: marcel, jhb MFC after: 1 week
* Merge r198724 to Book-E. casuword() non-atomically read the current valuenwhitehorn2010-02-201-2/+13
| | | | | | of its argument before atomically replacing it, which could occasionally return the wrong value on an SMP system. This resulted in user mutex operations hanging when using threaded applications.
* Call the proper linkup routine in PowerPC Book-E machdep.raj2010-02-151-1/+1
| | | | | Submitted by: attilio MFC after: 1 week
* Remove extraneous semicolons, no functional changes.mbr2010-01-071-2/+2
| | | | | Submitted by: Marc Balmer <marc@msys.ch> MFC after: 1 week
* Remove a warning in DELAY about large delays. In kern_shutdown.cmarcel2009-12-191-8/+1
| | | | we use excessive delays quite habitually.
* Add a CPU features framework on PowerPC and simplify CPU setup a littlenwhitehorn2009-11-281-1/+0
| | | | | | | | | | more. This provides three new sysctls to user space: hw.cpu_features - A bitmask of available CPU features hw.floatingpoint - Whether or not there is hardware FP support hw.altivec - Whether or not Altivec is available PR: powerpc/139154 MFC after: 10 days
* Simplify the invocation of vm_fault(). Specifically, eliminate the flagalc2009-11-271-2/+1
| | | | | | | VM_FAULT_DIRTY. The information provided by this flag can be trivially inferred by vm_fault(). Discussed with: kib
* Extract the code that records syscall results in the frame into MDkib2009-11-102-36/+56
| | | | | | | | | | | function cpu_set_syscall_retval(). Suggested by: marcel Reviewed by: marcel, davidxu PowerPC, ARM, ia64 changes: marcel Sparc64 tested and reviewed by: marius, also sunv reviewed MIPS tested by: gonzo MFC after: 1 month
* In r197963, a race with thread being selected for signal deliverykib2009-10-271-7/+1
| | | | | | | | | | | | | while in kernel mode, and later changing signal mask to block the signal, was fixed for sigprocmask(2) and ptread_exit(3). The same race exists for sigreturn(2), setcontext(2) and swapcontext(2) syscalls. Use kern_sigprocmask() instead of direct manipulation of td_sigmask to reschedule newly blocked signals, closing the race. Reviewed by: davidxu Tested by: pho MFC after: 1 month
* Add SMP support on U3-based G5 systems. This does not yet work perfectly:nwhitehorn2009-10-231-1/+6
| | | | | | | | | | at least on my Xserve, getting the decrementer and timebase on APs to tick requires setting up a clock chip over I2C, which is not yet done. While here, correct the 64-bit tlbie function to set the CPU to 64-bit mode correctly. Hardware donated by: grehan
* o Introduce vm_sync_icache() for making the I-cache coherent withmarcel2009-10-211-32/+40
| | | | | | | | | | | | | | | | | | | | | the memory or D-cache, depending on the semantics of the platform. vm_sync_icache() is basically a wrapper around pmap_sync_icache(), that translates the vm_map_t argumument to pmap_t. o Introduce pmap_sync_icache() to all PMAP implementation. For powerpc it replaces the pmap_page_executable() function, added to solve the I-cache problem in uiomove_fromphys(). o In proc_rwmem() call vm_sync_icache() when writing to a page that has execute permissions. This assures that when breakpoints are written, the I-cache will be coherent and the process will actually hit the breakpoint. o This also fixes the Book-E PMAP implementation that was missing necessary locking while trying to deal with the I-cache coherency in pmap_enter() (read: mmu_booke_enter_locked). The key property of this change is that the I-cache is made coherent *after* writes have been done. Doing it in the PMAP layer when adding or changing a mapping means that the I-cache is made coherent *before* any writes happen. The difference is key when the I-cache prefetches.
* Add a new type of VM object: OBJT_SG. An OBJT_SG object is very similar tojhb2009-07-241-1/+1
| | | | | | | | | | | a device pager (OBJT_DEVICE) object in that it uses fictitious pages to provide aliases to other memory addresses. The primary difference is that it uses an sglist(9) to determine the physical addresses for a given offset into the object instead of invoking the d_mmap() method in a device driver. Reviewed by: alc Approved by: re (kensmith) MFC after: 2 weeks
* Implement a facility for dynamic per-cpu variables.jeff2009-06-231-0/+6
| | | | | | | | | | | | | | | - Modules and kernel code alike may use DPCPU_DEFINE(), DPCPU_GET(), DPCPU_SET(), etc. akin to the statically defined PCPU_*. Requires only one extra instruction more than PCPU_* and is virtually the same as __thread for builtin and much faster for shared objects. DPCPU variables can be initialized when defined. - Modules are supported by relocating the module's per-cpu linker set over space reserved in the kernel. Modules may fail to load if there is insufficient space available. - Track space available for modules with a one-off extent allocator. Free may block for memory to allocate space for an extent. Reviewed by: jhb, rwatson, kan, sam, grehan, marius, marcel, stas
* Correct the method of waking the page daemon when the number of allocatedalc2009-06-131-7/+2
| | | | | | | | pv entries surpasses the high water mark. The problem was that the page daemon would only be awakened the first time that the high water mark was surpassed. (The variable "pagedaemon_waken" is a non-working vestige of FreeBSD 4.x, in which it was external and reset by the page daemon whenever it ran. This reset allowed subsequent wakeups by the pv entry allocator.)
* Fix Book-E/MPC85XX build. Some prototypes were wrong and got revealed withraj2009-06-131-4/+4
| | | | the recent kobj signature checking.
* Discover and handle the number of E500 CPUs in run time.raj2009-06-051-2/+9
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* Fill PTEs covering kernel code and data.raj2009-06-051-1/+15
| | | | | | | | | Without this fix pte_vatopa() was not able to retrieve physical address of data structures inside kernel, for example EFAULT was reported while acessing /dev/kmem ('netstat -nr'). Submitted by: Piotr Ziecik Obtained from: Semihalf
* Introduce support for cpufreq on PowerPC with the dynamic frequencynwhitehorn2009-05-311-8/+0
| | | | switching capabilities of the MPC7447A and MPC7448.
* Set PG_WRITEABLE in Book-E pmap_enter[_locked] if it creates a mapping thatraj2009-05-261-0/+4
| | | | | | permits write access. This is similar to r192671. Pointed out and reviewed by: alc
* Improve style(9), clean up.raj2009-05-213-18/+10
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* Initial support for SMP on PowerPC MPC85xx.raj2009-05-218-17/+556
| | | | | | Tested with Freescale dual-core MPC8572DS development system. Obtained from: Freescale, Semihalf
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