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path: root/sys/powerpc/booke/machdep.c
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* Fix other architectures and ZFS.attilio2013-02-211-0/+1
* 1. Have the APs initialize the TLB1 entries from what has beenmarcel2012-11-031-0/+1
* Implement cpu_flush_dcache(). This allows us to optimize __syncicache()marcel2012-07-021-1/+18
* Extract vendor specific Book-E pieces into separate files and have a commonraj2012-05-301-39/+7
* Let us manage differences of Book-E PowerPC variations i.e. vendor /raj2012-05-271-0/+6
* Rename e500 prefix to match other Book-E CPU variations. CPU id tidbits forraj2012-05-261-4/+5
* Finally, try to enable the nxstacks on amd64 and powerpc64 for both 64bitkib2012-01-301-0/+5
* Better support different kernel hand-offs. When loaded directlymarcel2011-05-281-21/+32
* Make MSGBUF_SIZE kernel option a loader tunable kern.msgbufsize.pluknet2011-01-211-2/+1
* Support booting non FDT-capable loaders:marcel2011-01-171-1/+20
* Add some platform KOBJ extensions and continue integrating PowerPCnwhitehorn2010-11-121-9/+0
* Centralize CPU idle routines into powerpc/cpu.c and use the samenwhitehorn2010-11-121-44/+0
* Use local TLB_UNLOCKED marker instead of MTX_UNOWNED for Book-E PowerPC trapraj2010-11-111-1/+1
* Adjust the order of operations in spinlock_enter() and spinlock_exit() tojhb2010-11-051-4/+10
* Refactor timer management code with priority to one-shot operation mode.mav2010-09-131-0/+12
* Eliminate FDT_IMMR_VA define.raj2010-07-191-1/+1
* MFppc64:nwhitehorn2010-07-131-1/+1
* Unify ABI-related bits of the Book-E and AIM machdep routinesnwhitehorn2010-07-121-329/+0
* Convert Freescale PowerPC platforms to FDT convention.raj2010-07-111-73/+23
* Move prototypes for kern_sigtimedwait() and kern_sigprocmask() tojhb2010-06-301-0/+1
* Change the arguments of exec_setregs() so that it receives a pointernwhitehorn2010-03-251-2/+2
* Enable power management for E500 cores. Use "doze" for now to makemarcel2010-03-231-12/+4
* Call the proper linkup routine in PowerPC Book-E machdep.raj2010-02-151-1/+1
* Add a CPU features framework on PowerPC and simplify CPU setup a littlenwhitehorn2009-11-281-1/+0
* In r197963, a race with thread being selected for signal deliverykib2009-10-271-7/+1
* Introduce support for cpufreq on PowerPC with the dynamic frequencynwhitehorn2009-05-311-8/+0
* Initial support for SMP on PowerPC MPC85xx.raj2009-05-211-0/+21
* Add cpu_flush_dcache() for use after non-DMA based I/O so that amarcel2009-05-181-0/+10
* Factor out platform dependent things unrelated to device drivers into anwhitehorn2009-05-141-29/+4
* o Properly set ksym_start & ksym_end when options DDB is set.marcel2009-04-211-2/+18
* Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge modenwhitehorn2009-04-041-0/+3
* Make Book-E debug register state part of the PCB context.raj2009-02-271-5/+2
* Rework BookE pmap towards multi-core support.raj2009-01-131-0/+1
* Modularize the Open Firmware client interface to allow run-time switchingnwhitehorn2008-12-201-1/+0
* Minor clean up of BookE/MPC85XX: iprove naming and style(9).raj2008-12-171-24/+29
* Allow the cacheline size on PowerPC to be set at runtime. This is essential fornwhitehorn2008-09-241-2/+3
* Improve kernel stack handling on e500.raj2008-08-261-15/+12
* The VM system no longer uses setPQL2(). Remove it and its helpers.alc2008-05-231-8/+0
* - Add an integer argument to idle to indicate how likely we are to wakejeff2008-04-251-1/+8
* In keeping with style(9)'s recommendations on macros, use a ';'rwatson2008-03-161-1/+1
* Obtain TSEC h/w address from the parent bus (OCP) and not rely blindly on whatraj2008-03-121-1/+24
* Enable the D-cache and I-cache when not already enabled.marcel2008-03-081-3/+28
* Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.raj2008-03-031-0/+963
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