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FreeBSD-src
RELENG_2_2
RELENG_2_3
RELENG_2_3_0
RELENG_2_3_1
RELENG_2_3_2
RELENG_2_3_3
RELENG_2_3_4
RELENG_2_4
RELENG_2_4_4
RELENG_2_4_OLD
devel
devel-11
releng/10.1
releng/10.3
releng/11.0
releng/11.1
stable/10
stable/11
Raptor Engineering's fork of pfsense FreeBSD src with pfSense changes
Raptor Engineering, LLC
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path:
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sys
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powerpc
/
booke
/
machdep.c
Commit message (
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)
Author
Age
Files
Lines
*
Fix other architectures and ZFS.
attilio
2013-02-21
1
-0
/
+1
*
1. Have the APs initialize the TLB1 entries from what has been
marcel
2012-11-03
1
-0
/
+1
*
Implement cpu_flush_dcache(). This allows us to optimize __syncicache()
marcel
2012-07-02
1
-1
/
+18
*
Extract vendor specific Book-E pieces into separate files and have a common
raj
2012-05-30
1
-39
/
+7
*
Let us manage differences of Book-E PowerPC variations i.e. vendor /
raj
2012-05-27
1
-0
/
+6
*
Rename e500 prefix to match other Book-E CPU variations. CPU id tidbits for
raj
2012-05-26
1
-4
/
+5
*
Finally, try to enable the nxstacks on amd64 and powerpc64 for both 64bit
kib
2012-01-30
1
-0
/
+5
*
Better support different kernel hand-offs. When loaded directly
marcel
2011-05-28
1
-21
/
+32
*
Make MSGBUF_SIZE kernel option a loader tunable kern.msgbufsize.
pluknet
2011-01-21
1
-2
/
+1
*
Support booting non FDT-capable loaders:
marcel
2011-01-17
1
-1
/
+20
*
Add some platform KOBJ extensions and continue integrating PowerPC
nwhitehorn
2010-11-12
1
-9
/
+0
*
Centralize CPU idle routines into powerpc/cpu.c and use the same
nwhitehorn
2010-11-12
1
-44
/
+0
*
Use local TLB_UNLOCKED marker instead of MTX_UNOWNED for Book-E PowerPC trap
raj
2010-11-11
1
-1
/
+1
*
Adjust the order of operations in spinlock_enter() and spinlock_exit() to
jhb
2010-11-05
1
-4
/
+10
*
Refactor timer management code with priority to one-shot operation mode.
mav
2010-09-13
1
-0
/
+12
*
Eliminate FDT_IMMR_VA define.
raj
2010-07-19
1
-1
/
+1
*
MFppc64:
nwhitehorn
2010-07-13
1
-1
/
+1
*
Unify ABI-related bits of the Book-E and AIM machdep routines
nwhitehorn
2010-07-12
1
-329
/
+0
*
Convert Freescale PowerPC platforms to FDT convention.
raj
2010-07-11
1
-73
/
+23
*
Move prototypes for kern_sigtimedwait() and kern_sigprocmask() to
jhb
2010-06-30
1
-0
/
+1
*
Change the arguments of exec_setregs() so that it receives a pointer
nwhitehorn
2010-03-25
1
-2
/
+2
*
Enable power management for E500 cores. Use "doze" for now to make
marcel
2010-03-23
1
-12
/
+4
*
Call the proper linkup routine in PowerPC Book-E machdep.
raj
2010-02-15
1
-1
/
+1
*
Add a CPU features framework on PowerPC and simplify CPU setup a little
nwhitehorn
2009-11-28
1
-1
/
+0
*
In r197963, a race with thread being selected for signal delivery
kib
2009-10-27
1
-7
/
+1
*
Introduce support for cpufreq on PowerPC with the dynamic frequency
nwhitehorn
2009-05-31
1
-8
/
+0
*
Initial support for SMP on PowerPC MPC85xx.
raj
2009-05-21
1
-0
/
+21
*
Add cpu_flush_dcache() for use after non-DMA based I/O so that a
marcel
2009-05-18
1
-0
/
+10
*
Factor out platform dependent things unrelated to device drivers into a
nwhitehorn
2009-05-14
1
-29
/
+4
*
o Properly set ksym_start & ksym_end when options DDB is set.
marcel
2009-04-21
1
-2
/
+18
*
Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge mode
nwhitehorn
2009-04-04
1
-0
/
+3
*
Make Book-E debug register state part of the PCB context.
raj
2009-02-27
1
-5
/
+2
*
Rework BookE pmap towards multi-core support.
raj
2009-01-13
1
-0
/
+1
*
Modularize the Open Firmware client interface to allow run-time switching
nwhitehorn
2008-12-20
1
-1
/
+0
*
Minor clean up of BookE/MPC85XX: iprove naming and style(9).
raj
2008-12-17
1
-24
/
+29
*
Allow the cacheline size on PowerPC to be set at runtime. This is essential for
nwhitehorn
2008-09-24
1
-2
/
+3
*
Improve kernel stack handling on e500.
raj
2008-08-26
1
-15
/
+12
*
The VM system no longer uses setPQL2(). Remove it and its helpers.
alc
2008-05-23
1
-8
/
+0
*
- Add an integer argument to idle to indicate how likely we are to wake
jeff
2008-04-25
1
-1
/
+8
*
In keeping with style(9)'s recommendations on macros, use a ';'
rwatson
2008-03-16
1
-1
/
+1
*
Obtain TSEC h/w address from the parent bus (OCP) and not rely blindly on what
raj
2008-03-12
1
-1
/
+24
*
Enable the D-cache and I-cache when not already enabled.
marcel
2008-03-08
1
-3
/
+28
*
Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.
raj
2008-03-03
1
-0
/
+963