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* Unify Book-E and AIM trap.cjhibbits2015-04-052-777/+0
| | | | | | | | | | | | | | | | | | | Summary: Book-E and AIM trap.c are almost identical, except for a few bits. This is step 1 in unifying them. This also renumbers EXC_DEBUG, to not conflict with AIM vector numbers. Since this is the only one thus far that is used in the switch statement in trap(), it's the only one renumbered. If others get added to the switch, which conflict with AIM numbers, they should also be renumbered. Reviewers: #powerpc, marcel, nwhitehorn Reviewed By: marcel Subscribers: imp Differential Revision: https://reviews.freebsd.org/D2215
* Fix integer truncation bug in malloc(9)rstone2015-04-013-4/+5
| | | | | | | | | | | | | | | | | A couple of internal functions used by malloc(9) and uma truncated a size_t down to an int. This could cause any number of issues (e.g. indefinite sleeps, memory corruption) if any kernel subsystem tried to allocate 2GB or more through malloc. zfs would attempt such an allocation when run on a system with 2TB or more of RAM. Note to self: When this is MFCed, sparc64 needs the same fix. Differential revision: https://reviews.freebsd.org/D2106 Reviewed by: kib Reported by: Michael Fuckner <michael@fuckner.net> Tested by: Michael Fuckner <michael@fuckner.net> MFC after: 2 weeks
* Deallocate any leftover page table entries in the LPAR at boot. Thisnwhitehorn2015-03-131-0/+2
| | | | prevents contamination from a previous kernel (e.g. after shutdown -r).
* Make assembly slightly more idiomatic (and able to be handled by clang'snwhitehorn2015-03-071-8/+6
| | | | integrated assembler).
* Make 32-bit PowerPC kernels, like 64-bit PowerPC kernels, position-independentnwhitehorn2015-03-074-73/+106
| | | | | | executables. The goal here, not yet accomplished, is to let the e500 kernel run under QEMU by setting KERNBASE to something that fits in low memory and then having the kernel relocate itself at runtime.
* The AIM DAR (data access fault address register) and Book-E DEAR registersnwhitehorn2015-03-041-8/+6
| | | | | | have the same meaning and occupy the same memory address in the trapframe courtesy of union. Avoid some pointless #ifdef by spelling them both 'DAR' in the trapframe.
* Move Book-E/AIM dependent bits for setting user PMAP during thread switchnwhitehorn2015-03-042-0/+7
| | | | | out of cpu_switch() and into pmap_activate() where they belong. This also removes all the #ifdef from cpu_switch().
* Fix unitialized variable.nwhitehorn2015-02-271-1/+1
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* New pmap implementation for 64-bit PowerPC processors. The main focus ofnwhitehorn2015-02-244-815/+815
| | | | | | | | | | | | | | | | | | | | | | | this change is to improve concurrency: - Drop global state stored in the shadow overflow page table (and all other global state) - Remove all global locks - Use per-PTE lock bits to allow parallel page insertion - Reconstruct state when requested for evicted PTEs instead of buffering it during overflow This drops total wall time for make buildworld on a 32-thread POWER8 system by a factor of two and system time by a factor of three, providing performance 20% better than similarly clocked Core i7 Xeons per-core. Performance on smaller SMP systems, where PMAP lock contention was not as much of an issue, is nearly unchanged. Tested on: POWER8, POWER5+, G5 UP, G5 SMP (64-bit and 32-bit kernels) Merged from: user/nwhitehorn/ppc64-pmap-rework Looked over by: jhibbits, andreast MFC after: 3 months Relnotes: yes Sponsored by: FreeBSD Foundation
* Kernel support for the Vector-Scalar eXtension (VSX) found on the POWER7nwhitehorn2015-02-222-2/+14
| | | | | | | | | | | | | | | | and POWER8. This instruction set unifies the 32 64-bit scalar floating point registers with the 32 128-bit vector registers into a single bank of 64 128-bit registers. Kernel support mostly amounts to saving and restoring the wider version of the floating point registers and making sure that both scalar FP and vector registers are enabled once a VSX instruction is executed. get_mcontext() and friends currently cannot see the high bits, which will require a little more work. As the system compiler (GCC 4.2) does not support VSX, making use of this from userland requires either newer GCC or clang. Relnotes: yes Sponsored by: FreeBSD Foundation
* Remove FreeBSD/wii.rpaulo2015-02-103-58/+28
| | | | | | | | | | This port failed to gain traction and probably only a couple Wii consoles ran FreeBSD all the way to single user mode with an md(4). IPC support was never implemented, so it was impossible to use any peripheral Any further development, if any, will happen at https://github.com/rpaulo/wii. Discussed with: nathanw (a long time ago), jhibbits
* Set thread priorities on multithreaded CPUs so that threads holding anwhitehorn2015-02-101-1/+4
| | | | | spinlock are high-priority and threads waiting for a spinlock are set to low priority.
* Simplify trapcode setup by placing a copy of the generic trap handler atnwhitehorn2015-02-091-35/+32
| | | | | | every possible trap address by default. This also makes sure the kernel notices (and panics at) traps from newer CPUs that the kernel was not expecting rather than executing gibberish memory.
* Fix typo in r277561.nwhitehorn2015-01-241-1/+1
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* Use relocation-safe methods to determine the sizes of the exception handlers.nwhitehorn2015-01-233-52/+61
| | | | | | A "size" symbol with its address set to the length of handler would be shifted forward with all other addresses when relocations are processed. Instead, just note the end and do the subtraction at runtime.
* Add POWER7+ and POWER8 to the list of CPUs with 32 SLB slots. This isnwhitehorn2015-01-211-0/+3
| | | | | | mostly a no-op since all currently-supported instances of these CPUs give the number of SLB slots in the device tree, but keep it here as well just in case.
* Make sure to relocate tmpstk with everything else and avoid processingnwhitehorn2015-01-211-2/+6
| | | | non-relative relocations that the UART code makes for absent modules.
* Make 64-bit AIM trap handlers relocatable by changing all absolute branchnwhitehorn2015-01-212-16/+69
| | | | | | | | | | | instructions to call through pointers instead. In general, these are set implicitly through relocation processing. One has to be set explicitly in machdep.c, however, to fit one handler in the tiny (8 instruction) space available. Reviewed by: andreast Differential revision: D1554 Tested on: UP and SMP G5, Cell, POWER5+
* On 64-bit PowerPC, use more native forms of the PPC 970 HID restorenwhitehorn2015-01-211-6/+23
| | | | | | | | sequences, like are used to read the HIDs. This is both easier to read and avoids a miscompilation by GCC in certain circumstances. Also avoid double restoration of HID4 and HID5. MFC after: 2 weeks
* Zero BSS explicitly if not started by loader(8). Add a check for the magicnwhitehorn2015-01-201-3/+14
| | | | | values that ePAPR-compliant loaders (like skiboot) put in the register loader uses for the metadata pointer to avoid confusing them.
* Add some initial infrastructure for relocating the kernel in place.nwhitehorn2015-01-191-3/+23
| | | | | MFC after: 2 months Differential revision: D1554
* Provide a tunable (machdep.moea64_bpvo_pool_size) to set the bootstrapnwhitehorn2015-01-191-6/+7
| | | | | | | | PVO pool size. The default errs on the exceedingly large side, so absent any intelligent automatic tuning, at least let the user set it to save RAM on memory-constrained systems. MFC after: 2 weeks
* Use TOC to look up all kernel globals on powerpc64 instead of doing thenwhitehorn2015-01-182-7/+12
| | | | | | non-relocatable lis @ha, ori @l dance and hoping they are below 4 GB. MFC after: 2 months
* Refactor PowerPC (especially AIM) init sequence to be less baroque.nwhitehorn2015-01-184-151/+62
| | | | MFC after: 2 months
* Do not remap Open Firmware mappings covered by the direct map. It'snwhitehorn2015-01-141-0/+7
| | | | | | pointless and wastes resources. MFC after: 1 week
* Factor out duplicated code from dumpsys() on each architecture into genericmarkj2015-01-072-178/+127
| | | | | | | | | | | | | | code in sys/kern/kern_dump.c. Most dumpsys() implementations are nearly identical and simply redefine a number of constants and helper subroutines; a generic implementation will make it easier to implement features around kernel core dumps. This change does not alter any minidump code and should have no functional impact. PR: 193873 Differential Revision: https://reviews.freebsd.org/D904 Submitted by: Conrad Meyer <conrad.meyer@isilon.com> Reviewed by: jhibbits (earlier version) Sponsored by: EMC / Isilon Storage Division
* Allow booting with both a real Open Firmware tree and a flattened version ofnwhitehorn2015-01-011-10/+13
| | | | | | | | the Open Firmware, as provided by petitboot, for example. Note that this is not quite complete, since RTAS instantiation still depends on callable firmware. MFC after: 2 weeks
* Restore the trap type argument to the DTrace trap hook, removed in r268600.markj2014-12-231-1/+1
| | | | | | It's redundant at the moment since it can be obtained from the trapframe on the architectures where DTrace is supported, but this won't be the case with ARM.
* Fix build for powerpc(32|64) kernels.andreast2014-12-101-0/+1
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* Add support for dtrace:fbt on modules for PowerPCjhibbits2014-11-294-32/+11
| | | | | | | | | | | | | | | | | Summary: Revert the initial FBT-with-KDB changes for trap_subr*.S, and instead use the db_trap filter function to handle dtrace trap filtering. With this, the MMU is enabled by the support code, simplifying the codepath altogether. Test Plan: Tested on my G4 PowerBook Reviewers: #powerpc, nwhitehorn Reviewed By: nwhitehorn Differential Revision: https://reviews.freebsd.org/D1207 MFC after: 3 weeks
* cpudep_ap_early_bootstrap() takes no arguments, so no need to give it one.jhibbits2014-11-202-2/+0
| | | | MFC after: 3 weeks
* Follow up to r225617. In order to maximize the re-usability of kernel codedavide2014-10-161-1/+1
| | | | | | | | in userland rename in-kernel getenv()/setenv() to kern_setenv()/kern_getenv(). This fixes a namespace collision with libc symbols. Submitted by: kmacy Tested by: make universe
* ddb: allow specifying the exact address of the symtab and strtabroyger2014-09-251-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the FreeBSD kernel is loaded from Xen the symtab and strtab are not loaded the same way as the native boot loader. This patch adds three new global variables to ddb that can be used to specify the exact position and size of those tables, so they can be directly used as parameters to db_add_symbol_table. A new helper is introduced, so callers that used to set ksym_start and ksym_end can use this helper to set the new variables. It also adds support for loading them from the Xen PVH port, that was previously missing those tables. Sponsored by: Citrix Systems R&D Reviewed by: kib ddb/db_main.c: - Add three new global variables: ksymtab, kstrtab, ksymtab_size that can be used to specify the position and size of the symtab and strtab. - Use those new variables in db_init in order to call db_add_symbol_table. - Move the logic in db_init to db_fetch_symtab in order to set ksymtab, kstrtab, ksymtab_size from ksym_start and ksym_end. ddb/ddb.h: - Add prototype for db_fetch_ksymtab. - Declate the extern variables ksymtab, kstrtab and ksymtab_size. x86/xen/pv.c: - Add support for finding the symtab and strtab when booted as a Xen PVH guest. Since Xen loads the symtab and strtab as NetBSD expects to find them we have to adapt and use the same method. amd64/amd64/machdep.c: arm/arm/machdep.c: i386/i386/machdep.c: mips/mips/machdep.c: pc98/pc98/machdep.c: powerpc/aim/machdep.c: powerpc/booke/machdep.c: sparc64/sparc64/machdep.c: - Use the newly introduced db_fetch_ksymtab in order to set ksymtab, kstrtab and ksymtab_size.
* We should have an isync after switching MSR[SF] in bootstrap.nwhitehorn2014-09-231-0/+1
| | | | | Submitted by: Mark Millard MFC after: 3 days
* Change pmap_enter(9) interface to take flags parameter and superpagekib2014-08-082-33/+56
| | | | | | | | | | | | | | | | mapping size (currently unused). The flags includes the fault access bits, wired flag as PMAP_ENTER_WIRED, and a new flag PMAP_ENTER_NOSLEEP to indicate that pmap should not sleep. For powerpc aim both 32 and 64 bit, fix implementation to ensure that the requested mapping is created when PMAP_ENTER_NOSLEEP is not specified, in particular, wait for the available memory required to proceed. In collaboration with: alc Tested by: nwhitehorn (ppc aim32 and booke) Sponsored by: The FreeBSD Foundation and EMC / Isilon Storage Division MFC after: 2 weeks
* Set the si_code appropriately for exception-caused signals.jhibbits2014-08-081-2/+18
| | | | | | | LLDB checks the si_code, and aborts if a code isn't known. MFC after: 2 weeks Relnotes: yes
* Retire pmap_change_wiring(). We have never used it to wire virtual pages.alc2014-08-032-79/+0
| | | | | | | | We continue to use pmap_enter() for that. For unwiring virtual pages, we now use pmap_unwire(), which unwires a range of virtual addresses instead of a single virtual page. Sponsored by: EMC / Isilon Storage Division
* Simplify the selection of the pvo_head and pvo allocation zone inalc2014-08-012-26/+10
| | | | | | moea_enter_locked() and moea64_enter(). Eliminate an unused variable from moea64_enter().
* Retire PVO_EXECUTABLE. It's neither used nor set correctly.alc2014-08-011-7/+0
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* Correct a long-standing problem in moea{,64}_pvo_enter() that was revealedalc2014-08-012-0/+44
| | | | | | | | by the combination of r268591 and r269134: When we attempt to add the wired attribute to an existing mapping, moea{,64}_pvo_enter() do nothing. (They only set the wired attribute on newly created mappings.) Tested by: andreast
* Correct a defect in r268591. In the implementation of the new functionalc2014-07-311-1/+2
| | | | | | | | pmap_unwire(), the call to MOEA64_PVO_TO_PTE() must be performed before any changes are made to the PVO. Otherwise, MOEA64_PVO_TO_PTE() will panic. Reported by: andreast
* Allow mappings of memory not previously direct-mapped by the kernel whennwhitehorn2014-07-191-0/+9
| | | | | | | | | | calling mmap on /dev/mem and add a handler for the possible userland machine checks that may result. Remove some pointless and wrong copy/paste that has been in here for a decade as well. This results in a /dev/mem with identical semantics to the x86 version. MFC after: 1 week
* Invoke the DTrace trap handler before calling trap() on amd64. This matchesmarkj2014-07-141-2/+2
| | | | | | | | | | | the upstream implementation and helps ensure that a trap induced by tracing fbt::trap:entry is handled without recursively generating another trap. This makes it possible to run most (but not all) of the DTrace tests under common/safety/ without triggering a kernel panic. Submitted by: Anton Rang <anton.rang@isilon.com> (original version) Phabric: D95
* Eliminate an unused variable. Refresh two comments.alc2014-07-131-5/+2
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* Implement pmap_unwire(). See r268327 for the motivation behind this change.alc2014-07-132-0/+57
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* Correct the accounting code for wired mappings. The wrong field of the PVOalc2014-07-101-2/+2
| | | | | | | | entry was being tested. We were incrementing and decrementing the pmap's wired mapping count based on whether the physical page being mapped or unmapped was cache coherent, not whether it was a wired mapping. Reviewed by: nwhitehorn
* Commit the rest of the changes that were intended to be part of r266826.markj2014-05-291-21/+0
| | | | X-MFC-with: r266826
* oea64 uses 4k pages, too.jhibbits2014-05-151-1/+1
| | | | | MFC after: 1 week X-MFC-with: r266116
* A page mask size is 12-bits, not 11.jhibbits2014-05-151-1/+1
| | | | MFC after: 1 week
* Rename global cnt to vm_cnt to avoid shadowing.bdrewery2014-03-222-3/+3
| | | | | | | | | | | | | | To reduce the diff struct pcu.cnt field was not renamed, so PCPU_OP(cnt.field) is still used. pc_cnt and pcpu are also used in kvm(3) and vmstat(8). The goal was to not affect externally used KPI. Bump __FreeBSD_version_ in case some out-of-tree module/code relies on the the global cnt variable. Exp-run revealed no ports using it directly. No objection from: arch@ Sponsored by: EMC / Isilon Storage Division
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