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* - Avoid calling pci_get_device() more than once in a single function.mdodd2003-09-142-22/+40
* Teach the re(4) driver about the CFG2 register, which tells us whetherwpaul2003-09-131-1/+15
* - For the 8169 chips, read the station address by forcing an EEPROMwpaul2003-09-111-4/+6
* Re-enable VLAN_MTU capability for this driver. (Got reverted whenwpaul2003-09-111-0/+1
* Add a PHY driver to support the built-in gigE PHY in the 8169S/8110Swpaul2003-09-112-2/+3
* Teach rl(4) about new hwrev codes.wpaul2003-09-101-1/+2
* Update hardware revision table. 0x04000000 appears to be the revisionwpaul2003-09-101-1/+2
* Fix path of pci #includes that I botched.wpaul2003-09-081-2/+2
* Take the support for the 8139C+/8169/8169S/8110S chips out of thewpaul2003-09-082-1226/+132
* Make indentation uniform.dfr2003-09-061-16/+16
* When recording resources for the amdpm driver, only describe the portsdfr2003-09-061-101/+36
* change timer to MPSAFEsam2003-09-052-5/+5
* Use stream bus space accesses to program the ID (station address)tmm2003-09-042-2/+6
* Examine and record the Silicon Revision Register on NS parts.phk2003-09-032-3/+38
* Use PCIR_BAR(x) instead of PCIR_MAPS.jhb2003-09-024-7/+7
* Add support for AMD766 and AMD768 chipsets.dfr2003-09-011-3/+9
* All davicom cards seem to need DC_TX_ALIGN.mbr2003-08-271-2/+1
* Revision 1.126 broke the interface of the bktr driver'snectar2003-08-261-14/+13
* Make TX on davicom 9102A working again. This chip needsmbr2003-08-241-0/+2
* PCI header files live in dev/pci.mdodd2003-08-231-2/+2
* Report media status for bitrate PHYs.mdodd2003-08-231-0/+8
* AGP GART driver for NVIDIA nForce/nForce2 chipsets.mdodd2003-08-232-0/+466
* dev/pci/meteor_reg.h doesn't exist. Revert this part of last commit.imp2003-08-231-1/+1
* Revert previous change for ncrreg.h. The header really lives inmarcel2003-08-231-1/+1
* Prefer new location of pci include files (which have only been in theimp2003-08-2228-59/+59
* Change instances of callout_init that specify MPSAFE behaviour tosam2003-08-191-1/+1
* "short cable" fix for DP8315sam2003-08-191-0/+23
* Argh. Last commit only had the __FBSDID() fix. Really add the device IDwpaul2003-08-152-0/+3
* It appears in some configurations with an on-board RTL8100 chip (in thiswpaul2003-08-151-2/+0
* Set the TX hardware checksum offload bits on all the descriptors of awpaul2003-08-132-17/+23
* Add or correct range checking of signal numbers in system calls andnectar2003-08-101-0/+2
* Grrr. There is a gratuitous difference in the RX descriptor statuswpaul2003-08-101-0/+18
* - Update some comments regarding hardware details of the 8169 andwpaul2003-08-102-40/+60
* Add preliminary support for the RealTek 8169 gigE chip. Changes:wpaul2003-08-072-4/+101
* Enable IFCAP_VLAN_MTU and increase MTU for it.simokawa2003-08-051-2/+3
* Use the BUS_DMA_ZERO flag.mux2003-07-272-12/+5
* Use the BUS_DMA_ZERO flag.mux2003-07-271-2/+1
* Use the BUS_DMA_ZERO flag instead of bzero()'ing DMA memory.mux2003-07-271-5/+2
* Changed the type of the variable `qidx' from u_int8_t to int,robert2003-07-271-2/+3
* Erm, my previous commit was wrong and sis_tick() was only called each timecognet2003-07-222-1/+6
* Add support for FA-511; Submitted by: Kenneth P. Stox; Pr 42858imp2003-07-192-0/+5
* Fix a busdma bogon:wpaul2003-07-181-3/+3
* Add support for the 8139C+ chipset. Unlike the other chips in the 8139wpaul2003-07-102-111/+1433
* Add support for a bunch of Microsoft networking products:wpaul2003-07-102-0/+34
* Support for large frames for VLANs was added by tweaking the packet sizewpaul2003-07-102-8/+47
* Make the dc(4) driver endian-clean, so to that it works on sparc64.mux2003-07-092-45/+56
* Convert the dc(4) driver to the busdma API. This is a necessary stepmux2003-07-062-117/+304
* Fix a bug that could cause dc(4) to m_freem() an already freedmux2003-07-061-1/+2
* Various style(9) and readability fixes.mux2003-07-061-14/+22
* - Ensure that the busdma API won't do deferred loads by using themux2003-07-041-9/+9
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