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* Free major#100phk2003-11-031-2/+0
* Remove explicit cardbus attachments from drivers where this is identicaldfr2003-11-033-3/+0
* Correct the spelling of m_devget() in the sysctl variable description.ru2003-11-021-1/+1
* Replace the if_name and if_unit members of struct ifnet with new membersbrooks2003-10-3114-104/+93
* mark interrupt handlers MPSAFEsam2003-10-291-1/+1
* Add simple support for AGP 3.0 including enabling 8x mode. The simplejhb2003-10-231-13/+108
* Use a switch statement on the devid instead of if-else for determing whichjhb2003-10-231-6/+18
* Const poison crc routines (why these aren't centralized, I'm not sure).imp2003-10-231-9/+9
* Fix m_head handling in sis_encap so that the correct mbuf is always handedsilby2003-10-191-9/+8
* Fix a problem where m_defrag would allocate a new mbuf to replace thesilby2003-10-191-8/+8
* Sanitize the code relating to the /dev/ti%d entries. In particular evictphk2003-10-101-68/+6
* Ignore CSR13, CSR14, CSR15 'Media Specific Data' registersmbr2003-10-052-12/+37
* Make the i810 AGP device create a "drmsub" child device. This will be attachedanholt2003-10-021-2/+31
* Add a tiny bit more delay in the xl_mii_sync function; this is necessarysilby2003-09-291-0/+2
* Add missing file, it is sorely needed to make if_sk.c compile again.wilko2003-09-201-0/+171
* Add support for SK-9521 V2.0 and 3COM 3C940.wilko2003-09-202-178/+812
* Remove jumbo buffer #defines that I ended up not needing.wpaul2003-09-191-8/+0
* Fix a typo in r1.8: The GTLB enable/flush bit is 1<<7, not 1<<8.anholt2003-09-171-1/+1
* Don't read the MAC address from a copy of the EEPROM in the softcmbr2003-09-161-4/+3
* - Avoid calling pci_get_device() more than once in a single function.mdodd2003-09-142-22/+40
* Teach the re(4) driver about the CFG2 register, which tells us whetherwpaul2003-09-131-1/+15
* - For the 8169 chips, read the station address by forcing an EEPROMwpaul2003-09-111-4/+6
* Re-enable VLAN_MTU capability for this driver. (Got reverted whenwpaul2003-09-111-0/+1
* Add a PHY driver to support the built-in gigE PHY in the 8169S/8110Swpaul2003-09-112-2/+3
* Teach rl(4) about new hwrev codes.wpaul2003-09-101-1/+2
* Update hardware revision table. 0x04000000 appears to be the revisionwpaul2003-09-101-1/+2
* Fix path of pci #includes that I botched.wpaul2003-09-081-2/+2
* Take the support for the 8139C+/8169/8169S/8110S chips out of thewpaul2003-09-082-1226/+132
* Make indentation uniform.dfr2003-09-061-16/+16
* When recording resources for the amdpm driver, only describe the portsdfr2003-09-061-101/+36
* change timer to MPSAFEsam2003-09-052-5/+5
* Use stream bus space accesses to program the ID (station address)tmm2003-09-042-2/+6
* Examine and record the Silicon Revision Register on NS parts.phk2003-09-032-3/+38
* Use PCIR_BAR(x) instead of PCIR_MAPS.jhb2003-09-024-7/+7
* Add support for AMD766 and AMD768 chipsets.dfr2003-09-011-3/+9
* All davicom cards seem to need DC_TX_ALIGN.mbr2003-08-271-2/+1
* Revision 1.126 broke the interface of the bktr driver'snectar2003-08-261-14/+13
* Make TX on davicom 9102A working again. This chip needsmbr2003-08-241-0/+2
* PCI header files live in dev/pci.mdodd2003-08-231-2/+2
* Report media status for bitrate PHYs.mdodd2003-08-231-0/+8
* AGP GART driver for NVIDIA nForce/nForce2 chipsets.mdodd2003-08-232-0/+466
* dev/pci/meteor_reg.h doesn't exist. Revert this part of last commit.imp2003-08-231-1/+1
* Revert previous change for ncrreg.h. The header really lives inmarcel2003-08-231-1/+1
* Prefer new location of pci include files (which have only been in theimp2003-08-2228-59/+59
* Change instances of callout_init that specify MPSAFE behaviour tosam2003-08-191-1/+1
* "short cable" fix for DP8315sam2003-08-191-0/+23
* Argh. Last commit only had the __FBSDID() fix. Really add the device IDwpaul2003-08-152-0/+3
* It appears in some configurations with an on-board RTL8100 chip (in thiswpaul2003-08-151-2/+0
* Set the TX hardware checksum offload bits on all the descriptors of awpaul2003-08-132-17/+23
* Add or correct range checking of signal numbers in system calls andnectar2003-08-101-0/+2
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