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* Move mn over. One of the last stragglers in sys/pci. There's noimp2008-11-021-1450/+0
| | | | module built for this hardware, so no changes needed.
* Make RL_TWISTER_ENABLE a tunable/sysctl. Eliminate it as an option.imp2008-11-022-26/+33
| | | | | | Fix module build. Submitted by: Kostik Belousov
* Fix a few typos/spelling errors in my comments from the last commit,imp2008-11-011-7/+7
| | | | | | plus a few others that had lingered in this driver... Submitted by: "b." bf2006a att yahoo KIBO com
* Add RL_TWISTER_ENABLE option. This enables the magic bits to do longimp2008-10-312-2/+165
| | | | | | | | | cable tuning. This has helped in some installations for hardware deployed by a former employer. Made optional because the lists aren't full of complaints about these cards... even when they were wildly popular. Reviewed by: attilio@, jhb@, trhodes@ (all an older version of the patch)
* Implement miibus_statchg handler. It detects whether rl(4)yongari2008-10-251-0/+34
| | | | | | | | established a valid link or not. In rl_start_locked, don't try to send packets unless we have valid link. While I'm here add a check that verifies whether driver can accept Tx requests by inspecting IFF_DRV_OACTIVE/IFF_DRV_RUNNING flag.
* After sending stop command to MAC, give hardware chance to drainyongari2008-10-251-0/+8
| | | | active DMA operation.
* Make rl_init_locked() call rl_reset. This will put hardware intoyongari2008-10-251-7/+4
| | | | sane state after resume/watchdog timeouts.
* Don't rearm watchdog timer in rl_txeof(). The watchdog timer wasyongari2008-10-251-2/+0
| | | | | already set in rl_start_locked(). Touching the watchdog timer in other places will hide the root cause of watchdog timeouts.
* Various bus_dma(9) fixes.yongari2008-10-252-120/+256
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - The hardware does not support DAC so limit DMA address space to 4GB. - Removed BUS_DMA_ALLOC_NOW flag. - Created separated Tx buffer and Rx buffer DMA tags. Previously it used to single DMA tag and it was not possible to specify different DMA restrictions. - Apply 4 bytes alignment limitation of Tx buffer. - Apply 8 bytes alignment limitation of Rx buffer. - Tx side bus_dmamap_load_mbuf_sg(9) support. - Preallocate Tx DMA maps as creating DMA maps take very long time on architectures that require real DMA maps. - Adjust guard buffer size to 1522 + 8 as it should include VLAN and additional reserved bytes in Rx buffer. - Plug memory leak in device detach. Previously wrong buffer address was used to free allocated memory. - Added rl_list_rx_init() to clear Rx buffer and cleared the buffer. - Don't destroy DMA maps in rl_txeof() as the DMA map should be reused. There is no reason to destroy/recreate the DMA maps in this driver. - Removed rl_dma_map_rxbuf()/rl_dma_map_txbuf() callbacks. - The hardware does not support descriptor based DMA on Tx side and the Tx buffer address should be aligned on 4 bytes boundary as well as manual padding for short frames. Because of this hardware limitation rl(4) always used to invoke m_defrag(9) to get a 4 bytes aligned single buffer. However m_defrag(9) takes a lot of CPU cycles on slow machines and not all packets need the help of m_defrag(9). Armed with the information, don't invoke m_defrag(9) if the following conditions are true. 1. Buffer is not fragmented. 2. Buffer is aligned on 4 bytes boundary. 3. Manual padding is not necessary. 4. Or padding is necessary but upper stack passed a writable buffer and the space needed for padding is satisfied. This change combined with preallocated DMA maps greatly increased Tx performance of driver on sparc64. - Moved bus_dmamap_sync(9) in rl_start_locked() to rl_encap() and corrected memory synchronization operation specifier of bus_dmamap_sync(9). - Removed bus_dmamap_unload(9) in rl_stop(). There is no need to reload/unload Rx buffer as rl(4) always have to copy from the buffer. It just needs proper bus_dmamap_sync(9) calls before copying the received frame. With this change rl(4) should work on systems with more than 4GB memory. PR: kern/128143
* Move wb driver from sys/pci to sys/dev/wb.imp2008-08-142-2312/+0
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* Move pcn driver from sys/pci to sys/dev/pcn.imp2008-08-142-2057/+0
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* Move the ste driver from sys/pci to sys/dev/ste.imp2008-08-142-2302/+0
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* Move the tl driver form sys/pci to sys/dev/tl.imp2008-08-142-2955/+0
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* Move sis to sys/dev/sis for consistency.imp2008-08-102-2802/+0
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* Move the xl driver form sys/pci to sys/dev/xl for consistency.imp2008-08-102-4112/+0
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* Add locking to the various iicbus(4) bridge drivers:jhb2008-08-041-0/+1
| | | | | | | | | | | | | | | | | | | | | - Just grab Giant in the ixp425_iic(4) driver since this driver uses a shared address/data register window pair to access the actual I2C registers. None of the other ixp425 drivers lock access to these shared address/data registers yet and that would need to be done before this could use any meaningful locking. - Add locking to the interrupt handler and 'iicbus_reset' methods of the at91_twi(4) driver. - Add locking to the pcf(4) driver. Other pcf(4) fixes include: - Don't needlessly zero the softc. - Use bus_foo rather than bus_space_foo and remove bus space tag and handle from softc. - The lpbb(4) driver just grabs Giant for now. This will be refined later when ppbus(4) is locked. - As was done with smbus earlier, move the DRIVER_MODULE() lines to match the bus driver (either iicbus or iicbb) to the bridge driver into the bridge drivers. Tested by: sam (arm/ixp425)
* The number of bits reserved for MSS in RealTek controllers isyongari2008-08-041-0/+8
| | | | | | | 11bits. This limits the maximum interface MTU size in TSO case as upper stack should not generate TCP segments with MSS greater than the limit. Armed with this information, disable TSO if interface MTU is greater than the limit.
* Set all of the "optimum performance" PHY registers for the 15D parts asjhb2008-07-301-10/+8
| | | | | | | | | well as the 15C since it seems to be required in practice. The Linux natsemi.c driver mostly does this as well. PR: kern/112179 Submitted by: Mark Willson mark - hydrus org uk MFC after: 1 week
* SIS_SETBIT() already does a read/modify/write operation, so there isn'tjhb2008-07-301-2/+1
| | | | | | a reason to read the register twice. MFC after: 1 week
* Add driver support for RTL8102E and RTL8102EL which is the secondyongari2008-07-091-0/+2
| | | | | | | | | generation of RTL810x PCIe fast ethernet controller. Note, Tx/Rx descriptor format is different from that of first generation of RTL8101E series. Jumbo frame is not supported for RTL810x family. Tested by: NAGATA Shinya ( maya AT negeta DOT com )
* Add a new RTL8169 variant, 8169SB(L)/8110SB(L).yongari2008-07-021-0/+1
| | | | | Reported by: nork Tested by: nork
* Add basic support for RTL8168C, RTL8168CP, RTL8111C and RTL8111CP.yongari2008-07-021-0/+24
| | | | | | | | | | | | | | | | ATM Tx/Rx checksum offload is supported but TSO and jumbo frame is not yet supported. Because these newer controllers use different descriptor formats, a flag RL_FLAG_DESCV2 flag was introduced to handle that case in Tx/Rx handler. Also newer controllers seems to require to not touch 'enable Tx/Rx bit' in RL_CPLUS_CMD register so don't blindly try to set that bits. Note, it seems that there is still power-saving related issue where driver fails to attach PHY. Rebooting seems to fix that issue but number of required reboots varys. Many thanks to users that helped during developement. I really appreciate their patient and test/feedbacks.
* Instead of allocating variables for each events/hardware flags, useyongari2008-07-021-2/+6
| | | | | | | | | a dedicated flag that represents controller capabilities/events. This will simplify many part of code that requires different workaround for each controller revisions and will enhance readability. While I'm here move PHY wakeup code up before mii_phy_probe() which seems to help to wake PHY in some cases.
* Switch to memory space register mapping over IO space. If thatyongari2008-07-021-0/+2
| | | | mapping fails fall back to traditional IO space access.
* Add support for VT8237 ISA bridge.gonzo2008-06-221-0/+7
| | | | | PR: kern/120714 Event: Bugathon#5
* Add the SMB functionality for the MCP65 chipset I happen tojoerg2008-06-181-0/+3
| | | | have in my new motherboard.
* Add another 8139D variant.remko2008-06-162-0/+3
| | | | | | | PR: 124622 Submitted by: Evgeny Zhirnov <jirnov at gmail dot com> Approved by: imp (mentor, implicit) MFC after: 3 days
* - Use bus_foo() rather than bus_space_foo() and remove bus space tag/handlejhb2008-06-065-33/+13
| | | | | | from softc. - Mark interrupt handlers MPSAFE as these drivers have been locked for a while.
* Remove unused 'xl_unit' member from softc.jhb2008-05-282-2/+0
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* - Set sc->dev to the new-bus device_t so all the device_printf()s work.jhb2008-05-121-1/+3
| | | | | | | - Add a missing newline to a printf. MFC after: 1 week Submitted by: Andriy Gapon avg <> icyb.net.ua
* It seems that RealTek 8129/8139 chip reports invalid length ofyongari2008-04-101-3/+5
| | | | | | | | | | | | | | | | received frame under certain conditions. wpaul said the length 0xfff0 is special meaning that indicates hardware is in the process of copying a packet into host memory. But it seems there are other cases that hardware is busy or stuck in bad situation even if the received frame length is not 0xfff0. To work-around this condition, add a check that verifys that recevied frame length is in valid range. If received length is out of range reinitialize hardware to recover from stuck condition. Reported by: Mike Tancsa ( mike AT sentex DOT net ) Tested by: Mike Tancsa Obtained from: OpenBSD MFC after: 1 week
* Padding more bytes than necessary one broke another variants ofyongari2008-03-311-0/+6
| | | | | | | | PCIe RealTek chips. Only pad IP packets if the payload is less than 28 bytes. Obtained from: NetBSD PR: kern/122221
* Replaced the misleading uses of a historical artefact M_TRYWAIT with M_WAIT.ru2008-03-251-26/+5
| | | | | | | | | | Removed dead code that assumed that M_TRYWAIT can return NULL; it's not true since the advent of MBUMA. Reviewed by: arch There are ongoing disputes as to whether we want to switch to directly using UMA flags M_WAITOK/M_NOWAIT for mbuf(9) allocation.
* - Take advantage of bus_dmamap_load_mbuf_sg(9).marius2008-03-242-94/+71
| | | | | | | | | | | | | | | - Take advantage of m_collapse(9). - Sync with other NIC drivers and prepend a TX mbuf if the first attempt to load it fails with an error other than EFBIG and stop trying instead of freeing it and keeping on trying to enqueue more mbufs. Also ensure the driver queue isn't empty before trying to enqueue mbufs in order to reduce locking operations. - In xl_ifmedia_upd() add a missing XL_UNLOCK(). [1] - Const'ify the xl_devs array. - Remove an outdated comment. PR: 113406 [1] MFC after: 1 month
* For MSI capable hardwares, enable MSI enable bit in RL_CFG2yongari2008-03-231-0/+1
| | | | | register. If MSI was disabled by hw.re.msi_disable tunable expliclty clear the MSI enable bit.
* vr(4) was repocopied to src/sys/dev/vr.yongari2008-03-112-2125/+0
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* Don't map memory/IO resource in device probe and just use PCIyongari2008-03-031-41/+18
| | | | | | vendor/revision/sub device id of the hardware to probe it. This is the same way as NetBSD does and it enhances readabilty a lot.
* Don't allow jumbo frame on 8139C+ controller.yongari2008-03-031-0/+2
| | | | While I'm here add a check for minimal MTU length.
* Implement WOL.yongari2008-03-031-1/+39
| | | | Tested by: Fabian Keil ( freebsd-listen AT fabienkeli DOT de )
* Give MEXTADD() another argument to make both void pointers to thephk2008-02-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | free function controlable, instead of passing the KVA of the buffer storage as the first argument. Fix all conventional users of the API to pass the KVA of the buffer as the first argument, to make this a no-op commit. Likely break the only non-convetional user of the API, after informing the relevant committer. Update the mbuf(9) manual page, which was already out of sync on this point. Bump __FreeBSD_version to 800016 as there is no way to tell how many arguments a CPP macro needs any other way. This paves the way for giving sendfile(9) a way to wait for the passed storage to have been accessed before returning. This does not affect the memory layout or size of mbufs. Parental oversight by: sam and rwatson. No MFC is anticipated.
* Add copyrights.ru2008-01-212-0/+52
| | | | PR: 119136
* sf(4) was repocopied to src/sys/dev/sf.yongari2008-01-212-2663/+0
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* Overhaul re(4).yongari2008-01-151-23/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | o Increased number of Rx/Tx descriptors to 256 for 8169 GigEs because it's hard to push the hardware to the limit with default 64 descriptors. TSO requires large number of Tx descriptors to pass a full sized TCP segment(65535 bytes IP packet) to hardware. Previously it consumed 32 Tx descriptors, assuming MCLBYTES DMA segment size, to send the TCP segment which means re(4) couldn't queue more than two full sized IP packets. For 8139C+ it still uses 64 Rx/Tx descriptors due to its hardware limitations. With this changes there are (very) small waste of memory for 8139C+ users but I don't think it would affect 8139C+ users for most cases. o Various bus_dma(9) fixes. - The hardware supports DAC so allow 64bit DMA operations. - Removed BUS_DMA_ALLOC_NOW flag. - Increased DMA segment size to 4096 from MCLBYTES because TSO consumes too many descriptors with MCLBYTES DMA segment size. - Tx/Rx side bus_dmamap_load_mbuf_sg(9) support. With these changes the code is more readable than previous one and got a (slightly) better performance as it doesn't need to pass/ decode arguments to/from callback function. - Removed unnecessary callback function re_dmamap_desc() and nuked rl_dmaload_arg structure which was used in the callback. - Additional protection for DMA map load failure. In case of failure reuse current map instead of returning a bogus DMA map. - Deferred DMA map unloading/sync operation for maximum performance until we really need to load new DMA map. If we happen to reuse current map(e.g. input error) there is no need to sync/unload/load again. - The number of allowable Tx DMA segments for a mbuf chains are now 32 instead of magic nseg value. If the number of available Tx descriptors are short enough to send highly fragmented mbuf chains an optimized re_defrag() is called to collapse mbuf chains which is supposed to be much faster than m_defrag(9). re_defrag() was borrowed from ath(4). - Separated Rx/Tx DMA tag from a common DMA tag such that Rx DMA tag correctly uses DMA maps that were created with DMA alignment restriction(8bytes alignments). Tx DMA tag does not have such alignment limitation. - Added additional sanity checks for DMA ring map load failure. - Added additional spare Rx DMA map for graceful handling of Rx DMA map load failure. - Fixed misused bus_dmamap_sync(9) and added missing bus_dmamap_sync(9) in re_encap()/re_txeof()/re_rxeof(). o Enabled TSO again as re(4) have reasonable number of Tx descriptors. o Don't touch DMA address of a Tx descriptor in re_txeof(). It's not needed. o Fix incorrect update of if_ierrors counter. For Rx buffer shortage it should update if_qdrops as the buffer is reused. o Added checks for unsupported H/W revisions and return ENXIO for these hardwares. This is required to remove resource allocation code in re_probe as other drivers do in device probe routine. o Modified descriptor index manipulation macros as it's now possible to have different number of descriptors for Rx/Tx. o In re_start, to save a lock operation, use IFQ_DRV_IS_EMPTY before trying to invoke IFQ_DRV_DEQUEUE. Also don't blindly call re_encap since we already know the number of available Tx descriptors in advance. o Removed RL_TX_DESC_THLD which was used to reserve RL_TX_DESC_THLD descriptors in Tx path. There is no such a limitation mentioned in 8139C+/8169/8110/8168/8101/8111 datasheet and it seems to work ok without reserving RL_TX_DESC_THLD descriptors. o Fix a comment for RL_GTXSTART. The register is 8bits register. o Added comments for 8169/8139C+ hardware restrictions on descriptors. o Removed forward declaration for "struct rl_softc", it's not needed. o Added a new structure rl_txdesc for Tx descriptor managements and a structure rl_rxdesc for Rx descriptor managements. o Removed unused member variable rl_intlock in driver softc. There are still several unused member variables which are supposed to be used to access hardware statistics counters. But it seems that accessing hardware counters were not implemented yet.
* Add another RTL8168 revision 3 which is found on RTL8111-GR Gigabityongari2007-12-081-0/+1
| | | | | | | | | Ethernet Controller. Multicast filtering wasn't tested and needs more expore. While I'm here change complex if statements with switch statement which would improve readability. Reported by: Abdullah Ibn Hamad Al-Marri < wearabnet AT yahoo DOT ca > Tested by: Abdullah Ibn Hamad Al-Marri < wearabnet AT yahoo DOT ca >
* Remove XRPU driver, after asking all the users.phk2007-12-011-268/+0
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* Add the FNW3603TX Planex NIC.remko2007-11-262-0/+7
| | | | | | | PR: 76081 Approved by: imp (mentor) Submitted by: umi at pocke dot org MFC After: 3 days
* Fix function prototype for device_shutdown method.yongari2007-11-225-11/+19
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* Move the agp(4) driver from sys/pci to sys/dev/agp. __FreeBSD_version wasjhb2007-11-1214-5891/+0
| | | | | | | | | bumped to 800004 to note the change though userland apps should not be affected since they use <sys/agpio.h> rather than the headers in sys/dev/agp. Discussed with: anholt Repocopy by: simon
* Add SMB support for the MCP61 chipset.remko2007-11-101-0/+3
| | | | | | PR: 108830 Submitted by: Edwin Mons <freebsd at edwinm dot ik dot nu> Approbed by: imp (mentor)
* Split agp_generic_detach() up into two routines: agp_free_cdev() destroysjhb2007-10-3011-38/+39
| | | | | | | | | /dev/agpgart and agp_free_res() frees resources like the BAR for the aperture. Splitting this up lets chipset-specific detach routines manipulate the aperture during their detach routines without panicing. MFC after: 1 week Reviewed by: anholt
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