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* Remove jumbo buffer #defines that I ended up not needing.wpaul2003-09-191-8/+0
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* Teach the re(4) driver about the CFG2 register, which tells us whetherwpaul2003-09-131-1/+15
| | | | | | | | | we're on a 32-bit/64-bit bus or not. Use this to decide if we should set the PCI dual-address cycle enable bit in the C+ command register. (Enabling DAC on a 32-bit bus seems to do bad things.) Also, initialize the C+ command register early in the re_init() routine. The documentation says this register should be configured first.
* - For the 8169 chips, read the station address by forcing an EEPROMwpaul2003-09-111-4/+6
| | | | | | | | | | | | | | | | | | | | | autoload and then copying the contends of the station address registers. For some reason, reading the EEPROM on the 8169S doesn't work right. This gets around the problem, and allows us to read the station address correctly on the 8169S. - Insert a delay after initiating packet transmition in re_diag() to allow lots of time for the frame to echo back to the host, and wait for both the 'RX complete' and 'timeout expired' bits in the ISR register to be set. - Deal more intelligently with the fact that the frame length field in the RX descriptor is a different width on the 8139C+ than it is on the 8169/8169S/8110S - For the 8169, you have to set bit 17 in the TX config register to enter digital loopback mode, but for the 8139C+, you have to set both bits 17 and 18. Take this into account so that re_diag() works properly for both types of chips.
* Add a PHY driver to support the built-in gigE PHY in the 8169S/8110Swpaul2003-09-111-1/+1
| | | | | | | | | | | | | | | | | | ethernet chips. This driver is pretty simple, however it contains special DSP initialization code which is needed in order to get the chip to negotiate a gigE link. (This special initialization may not be needed in subsequent chip revs.) Also: - Fix typo in if_rlreg.h (RL_GMEDIASTAT_1000MPS -> RL_GMEDIASTAT_1000MBPS) - Deal with shared interrupts in re_intr(): if interface isn't up, return. - Fix another bug in re_gmii_writereg() (properly apply data field mask) - Allow PHY driver to read the RL_GMEDIASTAT register via the re_gmii_readreg() register (this is register needed to determine real time link/media status).
* Update hardware revision table. 0x04000000 appears to be the revisionwpaul2003-09-101-1/+2
| | | | | | | | for the 8169S, according to my sample board. The RealTek Linux driver mentions 0x00800000. I'm assigning this to the 8110S until I get more info on it. (The (preliminary) RealTek docs only say that 8169S/8110S chips will have some combination of those two bits set, but doesn't say exactly what bit combination goes with which chip variant.)
* Take the support for the 8139C+/8169/8169S/8110S chips out of thewpaul2003-09-081-7/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | rl(4) driver and put it in a new re(4) driver. The re(4) driver shares the if_rlreg.h file with rl(4) but is a separate module. (Ultimately I may change this. For now, it's convenient.) rl(4) has been modified so that it will never attach to an 8139C+ chip, leaving it to re(4) instead. Only re(4) has the PCI IDs to match the 8169/8169S/8110S gigE chips. if_re.c contains the same basic code that was originally bolted onto if_rl.c, with the following updates: - Added support for jumbo frames. Currently, there seems to be a limit of approximately 6200 bytes for jumbo frames on transmit. (This was determined via experimentation.) The 8169S/8110S chips apparently are limited to 7.5K frames on transmit. This may require some more work, though the framework to handle jumbo frames on RX is in place: the re_rxeof() routine will gather up frames than span multiple 2K clusters into a single mbuf list. - Fixed bug in re_txeof(): if we reap some of the TX buffers, but there are still some pending, re-arm the timer before exiting re_txeof() so that another timeout interrupt will be generated, just in case re_start() doesn't do it for us. - Handle the 'link state changed' interrupt - Fix a detach bug. If re(4) is loaded as a module, and you do tcpdump -i re0, then you do 'kldunload if_re,' the system will panic after a few seconds. This happens because ether_ifdetach() ends up calling the BPF detach code, which notices the interface is in promiscuous mode and tries to switch promisc mode off while detaching the BPF listner. This ultimately results in a call to re_ioctl() (due to SIOCSIFFLAGS), which in turn calls re_init() to handle the IFF_PROMISC flag change. Unfortunately, calling re_init() here turns the chip back on and restarts the 1-second timeout loop that drives re_tick(). By the time the timeout fires, if_re.ko has been unloaded, which results in a call to invalid code and blows up the system. To fix this, I cleared the IFF_UP flag before calling ether_ifdetach(), which stops the ioctl routine from trying to reset the chip. - Modified comments in re_rxeof() relating to the difference in RX descriptor status bit layout between the 8139C+ and the gigE chips. The layout is different because the frame length field was expanded from 12 bits to 13, and they got rid of one of the status bits to make room. - Add diagnostic code (re_diag()) to test for the case where a user has installed a broken 32-bit 8169 PCI NIC in a 64-bit slot. Some NICs have the REQ64# and ACK64# lines connected even though the board is 32-bit only (in this case, they should be pulled high). This fools the chip into doing 64-bit DMA transfers even though there is no 64-bit data path. To detect this, re_diag() puts the chip into digital loopback mode and sets the receiver to promiscuous mode, then initiates a single 64-byte packet transmission. The frame is echoed back to the host, and if the frame contents are intact, we know DMA is working correctly, otherwise we complain loudly on the console and abort the device attach. (At the moment, I don't know of any way to work around the problem other than physically modifying the board, so until/unless I can think of a software workaround, this will have do to.) - Created re(4) man page - Modified rlphy.c to allow re(4) to attach as well as rl(4). Note that this code works for the sample 8169/Marvell 88E1000 NIC that I have, but probably won't work for the 8169S/8110S chips. RealTek has sent me some sample NICs, but they haven't arrived yet. I will probably need to add an rlgphy driver to handle the on-board PHY in the 8169S/8110S (it needs special DSP initialization).
* Use stream bus space accesses to program the ID (station address)tmm2003-09-041-0/+2
| | | | | registers; otherwise, the byte order of the address is changed on big-endian machines.
* Argh. Last commit only had the __FBSDID() fix. Really add the device IDwpaul2003-08-151-0/+1
| | | | for the 8100 this time.
* Set the TX hardware checksum offload bits on all the descriptors of awpaul2003-08-131-0/+1
| | | | | | | multi-fragment transmission. I'm not sure if this is a bug or a requirement that I overlooked with going through the documentation, but the sample 8169 NIC that I have seems to require it at least some of the time or else it botches TCP checksums on segments that span multiple descriptors.
* - Update some comments regarding hardware details of the 8169 andwpaul2003-08-101-3/+6
| | | | | | | | | | | | | | | | | note the existence of the 8169S and 8110S components. (The 8169 is just a MAC, the 8169S and 8110S contain both a MAC and PHY.) - Properly handle list and buffer addresses as 64-bit. The RX and TX DMA list addresses should be bus_addr_t's. Added RL_ADDR_HI() and RL_ADDR_LO() macros to obtain values for writing into chip registers. - Set a slightly different TIMERINT value for 8169 NICs for improved performance. - Change left out of previous commit log: added some additional hardware rev codes for other 10/100 chips and for the 8169S/8110S 'rev C' gigE MACs.
* Add preliminary support for the RealTek 8169 gigE chip. Changes:wpaul2003-08-071-0/+5
| | | | | | | | | | | | | | | | | | | | | - Fix a bug in rl_dma_map_desc(): set the 'end of ring' bit in the right descriptor (DESC_CNT - 1, not DESC_CNT). The 8139C+ is limited to 64 descriptors and automatically wraps at 64 descriptors even if the EOR bit isn't set, but the 8169 NIC can have up to 1024 descriptors per ring, so we must set the wrap point in the right place. - RealTek moved the RL_TIMERINT register from offset 0x54 to 0x58 in the 8169 -- account for this. - Added rl_gmii_readreg() and rl_gmii_writereg() routines. - Fix rl_probe() to deal with the case where the base type is not RL_8139. The next step is to add jumbo buffer support. Tested with the Xterasys XN-152 NIC (hard to beat $29 for a gigE NIC).
* Add support for the 8139C+ chipset. Unlike the other chips in the 8139wpaul2003-07-101-3/+294
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | series, the 8139C+ has a descriptor-based DMA mechanism, and its performance is actually pretty respectable. Note: the 8139D chip does not support C+ mode. Only the 8139C+ and 8169 gigE chips support C+ mode. Supported features: - RX and TX checksum offload - hardware VLAN tag insertion/extraction - TX interrupt moderation using the 8139's on-board timer Everything should be properly busdma'ed and endian-independent, so things should work ok on non-x86 platforms. Unfortunately, my call for testers on this code was met with deafening silence, and I don't have access to any non-x86 FreeBSD boxes at the moment, so this is speculation. The device detection code has been cleaned up a little as well (thanks to Michal Mertl) for the patches. There are also updates to the rl(4) man page (which I accidentally checked in before when I updated the dc(4) man page. Oops.) Todo: finish support for the 8169 gigabit ethernet chip. This mainly requires writing an rlgphy driver to handle the 8169's built-in PHY. This will have to wait until I actually get my hands on an 8169 card for testing though. (I still can't find a source for one in the U.S. Suggestions/pointers welcome.)
* Add support for Planex FNW-3800-TX(CardBus 100M/10M).sanpei2003-03-181-0/+10
| | | | | Submitted by: Kunihiro Arai <araik@attglobal.net> Obtained from: [bsd-nomads:16625]
* Add support for Peppercon ROL-F Card.dan2003-02-231-0/+8
| | | | | Submitted by: Sascha Holzeiter <sascha@root-login.org> PR: 48559
* Add support for Corega FEtherII CB-TXD (CardBus 100M/10M).sanpei2003-01-111-2/+9
| | | | Fix typo (Coreaga->Corega)
* Add support for Corega FEther CB-TXD (CardBus 100M/10M).iwasaki2002-09-061-0/+10
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* Add support for the D-Link DFE-690TXD Cardbus card which has a RealTek 8139jhb2002-05-061-0/+5
| | | | with its own PCI ID.
* Add DEVICE_POLLING support to the "rl" driver.luigi2002-04-161-0/+3
| | | | | | The diffs are very similar to the ones for the "sis" driver. MFC After: 5 days
* Nortel Networks sells a RealTek 8139-based NIC that's basicallywpaul2002-04-111-0/+5
| | | | | | the same thing as the SMC 1211, but with their own vendor ID. Update the device list to support this NIC. (Discovered these cards lying around the lab at work.)
* Add suspend/resume code mostly merged from fxp driver.iwasaki2001-11-231-0/+7
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* Convert the if_sis and if_rl drivers to use the bus_dma API instead ofwpaul2001-08-151-6/+7
| | | | | | | | | | calling vtophys() and contigmalloc()/contigfree() directly. Hopefully, I have shaken out all of the problems with busdma on the alpha now. (Everything seems to work as expected.) Also, change the max RX DMA limit to 1024 bytes instead of "unlimited," as the latter seems not to work correctly on the alpha that I tested. (At 100Mbps, all attempts to receive frames yield RX errors.)
* Big round of minor updates:wpaul2001-02-211-0/+10
| | | | | | | | | | | | | | - Use pci_get_powerstate()/pci_set_powerstate() in all the other drivers that need them so we don't have to fiddle with the PCI power management registers directly. - Use pci_enable_busmaster()/pci_enable_io() to turn on busmastering and PIO/memory mapped accesses. - Add support to the RealTek driver for the D-Link DFE-530TX+ which has a RealTek 8139 with its own PCI ID. (Submitted by Jason Wright) - Have the SiS 900/National DP83815 driver be sure to disable PME mode in sis_reset(). This apparently fixes a problem on some motherboards where the DP83815 chip fails to receive packets. (Submitted by Chuck McCrobie <mccrobie@cablespeed.com>)
* Change and clean the mutex lock interface.bmilekic2001-02-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mtx_enter(lock, type) becomes: mtx_lock(lock) for sleep locks (MTX_DEF-initialized locks) mtx_lock_spin(lock) for spin locks (MTX_SPIN-initialized) similarily, for releasing a lock, we now have: mtx_unlock(lock) for MTX_DEF and mtx_unlock_spin(lock) for MTX_SPIN. We change the caller interface for the two different types of locks because the semantics are entirely different for each case, and this makes it explicitly clear and, at the same time, it rids us of the extra `type' argument. The enter->lock and exit->unlock change has been made with the idea that we're "locking data" and not "entering locked code" in mind. Further, remove all additional "flags" previously passed to the lock acquire/release routines with the exception of two: MTX_QUIET and MTX_NOSWITCH The functionality of these flags is preserved and they can be passed to the lock/unlock routines by calling the corresponding wrappers: mtx_{lock, unlock}_flags(lock, flag(s)) and mtx_{lock, unlock}_spin_flags(lock, flag(s)) for MTX_DEF and MTX_SPIN locks, respectively. Re-inline some lock acq/rel code; in the sleep lock case, we only inline the _obtain_lock()s in order to ensure that the inlined code fits into a cache line. In the spin lock case, we inline recursion and actually only perform a function call if we need to spin. This change has been made with the idea that we generally tend to avoid spin locks and that also the spin locks that we do have and are heavily used (i.e. sched_lock) do recurse, and therefore in an effort to reduce function call overhead for some architectures (such as alpha), we inline recursion for this case. Create a new malloc type for the witness code and retire from using the M_DEV type. The new type is called M_WITNESS and is only declared if WITNESS is enabled. Begin cleaning up some machdep/mutex.h code - specifically updated the "optimized" inlined code in alpha/mutex.h and wrote MTX_LOCK_SPIN and MTX_UNLOCK_SPIN asm macros for the i386/mutex.h as we presently need those. Finally, caught up to the interface changes in all sys code. Contributors: jake, jhb, jasone (in no particular order)
* Fix support for cardbus cards:wpaul2000-10-301-1/+3
| | | | | | | | | | - Add DRIVER_MODULE() declaration to make this driver a child of cardbus - Handle different width EEPROMs The CIS parser still barfs when scanning this card, but it seems to probe/attach correctly anyway. I can't do a traffic test just yet since I don't have a proper crossover cable handy.
* Add PCI IDs for some additional cardbus cards. Yes, there really iswpaul2000-10-281-0/+1
| | | | | | | a RealTek 8139 cardbus device. Unfortunately it doesn't quite work yet because the CIS parser barfs on it. Submitted by msmith, with some small tweaks by me.
* First round of converting network drivers from spls to mutexes. Thiswpaul2000-10-131-0/+4
| | | | | | | | takes care of all the 10/100 and gigE PCI drivers that I've done. Next will be the wireless drivers, then the USB ones. I may pick up some stragglers along the way. I'm sort of playing this by ear: if anyone spots any places where I've screwed up horribly, please let me know.
* Make some tweaks to the RealTek driver:wpaul1999-10-211-1/+3
| | | | | | | | | | | | | | | | | | - Fix a bug in rl_rxeof() handler: in the case where the packet wraps from the end of the receive buffer back to the beginning, we need to insure that at least sizeof(ether_header) bytes make it into the first mbuf. If we don't, then doing eh = mtod(m, struct ether_header *) loses. To avoid this, we use m_pullup() to suck at least MHLEN - RL_ETHER_ALIGN bytes into the first mbuf, which should also help small packets fit into a single mbuf. Pointed out by: Philip A. Prindeville <philipp@zembu.com> - Make the transmit threshold autotuning: start off with a small value and jack it up when TX underruns are detected. - Also improve TX error recovery: kick the chip in the head with a reset/init sequence to make sure it recovers afer a transmit error.
* Convert the RealTek 8139 driver to newbus and miibus in one swell foop.wpaul1999-08-311-145/+8
| | | | Also set it up to be compiled as a module.
* $Id$ -> $FreeBSD$peter1999-08-281-1/+1
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* Fix power management register definitions.wpaul1999-08-211-5/+5
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* Remove the definitions for the SiS 900 chip. This is not a RealTekwpaul1999-07-221-11/+1
| | | | | clone after all. I have the datasheets for this part; hopefully I can write a proper driver soon.
* Tweak FIFO and DMA thresholds to improve performance and reduce likelyhoodwpaul1999-06-201-5/+5
| | | | | | of RX FIFO overruns. Submitted by: bde
* Fix up the RealTek 8139 driver to work on FreeBSD/alpha. This involves awpaul1999-06-191-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | few changes: - there was a bug in rl_list_tx_init(): it was calculating the registers to initialize incorrectly. Not a problem on the x86 where unaligned access are allowed, but a problem on the alpha. - set rl_btag accordingly depending on the machine type - rl_rxeof() needs to be sure to longword-align the packet data. This is a little tricky since we copy the data out of the receive buffer using m_devget(), however there's no way to tell m_devget() to fill in the mbufs starting at a particular offset. To get around this, we tell m_devget to copy bytes+2 bytes starting at offset offset-2. This results in the proper alignment, and we can trim off the two leading bytes afterwards with m_adj(). We also allocate some extra space before the start of the receive buffer so that we don't get into trouble in the case where offset == 0. - redefine vtophys() in if_rlreg.h for the alpha. Making this chipset work on the alpha is sort of the inverse of putting a jet engine on a rowboat (putting a propeller on a 747?) but when you can get these things for $5 a pop, it's hard to stop people from buying them.
* Add support for SiS 900 chipset (PCI ID 0x1039/0x0900), which appears towpaul1999-05-301-1/+11
| | | | be yet another rebadged RealTek 8139.
* Merge in some updates for the RealTek driver, mainly:wpaul1999-04-121-27/+53
| | | | | | - Rewrite the transmit section to be a little less bogus. - Set ifq_maxlen correctly. RL_TX_LIST_CNT - 1 is wrong, because for the RealTek, RL_TX_LIST_CNT is 4. Set it to IFQ_MAXLEN instead.
* Add support for still more cheapo 10/100 cards: Delta Electronics andwpaul1999-02-231-6/+26
| | | | | | | | | | Addtron appear to have their own VIA Rhine II and RealTek 8139 boards with custom PCI vendor and device IDs. This commit updates the PCI vendor and device lists in the vr and rl drivers so that we can probe the additional devices. Found by: nosing around the PCI vendor and device code list at: http://www.halcyon.com/scripts/jboemler/pci/pcicode
* if_rl.c: make a small tweak to properly handle the Accton MPX 5030/5038wpaul1998-12-071-31/+13
| | | | | | | | as a RealTek 8139 if_rlreg.h: use bus_space_read_X() in CSR_READ_X() macros instead of directly calling inb()/outb() etc... rl.4 + RELNOTES.TXT: mention that SMC EtherEZ PCI 1211-TX is supported by the RealTek driver
* The Accton 1207D adapter uses a chip called the MXP 5030 (or 5038)wpaul1998-11-181-3/+11
| | | | | | | | | | | | | | which is either a RealTek 8139 in disguise or a RealTek workalike. This commit fixes the PCI vendor/device ID for this device and updates the description string to reflect the actual identity of the device. I also changed the transmit encapsulation routine to always to buffer copies on transmit. We end up doing this 99% of the time anyway. I also tweaked the code that pads packets out to the minimum length (60) bytes. I was fixing up the m_pkthdr.len value but not m_len. I don't think this makes that much difference in the grand scheme of things, but it makes me feel better.
* Add driver support for PCI fast ethernet adapters based on thewpaul1998-10-181-0/+564
RealTek 8129/8139 chipset like I've been threatening. Update kernel configs, userconfig.c, relnotes and sysinstall. No man page yet; comming soon. I consider this driver stable enough that I want to give it some exposure in -current.
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