| Commit message (Collapse) | Author | Age | Files | Lines |
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- Use printf() and device_printf() instead of log() in ichsmb(4).
- Create the mutex sooner during ichsmb(4) attach.
- Attach the interrupt handler later during ichsmb(4) attach to avoid
races.
- Don't try to set PCIM_CMD_PORTEN in ichsmb(4) attach as the PCI bus
driver does this already.
- Add locking to alpm(4), amdpm(4), amdsmb(4), intsmb(4), nfsmb(4), and
viapm(4).
- Axe ALPM_SMBIO_BASE_ADDR, it's not really safe to write arbitrary values
into BARs, and the PCI bus layer will allocate resources now if needed.
- Merge intpm(4) and intsmb(4) into just intsmb(4). Previously, intpm(4)
attached to the PCI device and created an intsmb(4) child. Now,
intsmb(4) just attaches to PCI directly.
- Change several intsmb functions to take a softc instead of a device_t
to make things simpler.
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- Change smbus_callback() to pass a void * rather than caddr_t.
- Change smbus_bread() to pass a pointer to the count and have it be an
in/out parameter. The input is the size of the buffer (same as before),
but on return it will contain the actual amount of data read back from
the bus. Note that this value may be larger than the input value. It
is up to the caller to treat this as an error if desired.
- Change the SMB_BREAD ioctl to write out the updated struct smbcmd which
will contain the actual number of bytes read in the 'count' field. To
preserve the previous ABI, the old ioctl value is mapped to SMB_OLD_BREAD
which doesn't copy the updated smbcmd back out to userland. I doubt anyone
actually used the old BREAD anyway as it was rediculous to do a bulk-read
but not tell the using program how much data was actually read.
- Make the smbus driver and devclass public in the smbus module and
push all the DRIVER_MODULE()'s for attaching the smbus driver to
various foosmb drivers out into the foosmb modules. This makes all
the foosmb logic centralized and allows new foosmb modules to be
self-contained w/o having to hack smbus.c everytime a new smbus driver
is added.
- Add a new SMB_EINVAL error bit and use it in place of EINVAL to return
an error for bad arguments (such as invalid counts for bread and bwrite).
- Map SMB bus error bits to EIO in smbus_error().
- Make the smbus driver call bus_generic_probe() and require child drivers
such as smb(4) to create device_t's via identify routines. Previously,
smbus just created one anonymous device during attach, and if you had
multiple drivers that could attach it was just random chance as to which
driver got to probe for the sole device_t first.
- Add a mutex to the smbus(4) softc and use it in place of dummy splhigh()
to protect the 'owner' field and perform necessary synchronization for
smbus_request_bus() and smbus_release_bus().
- Change the bread() and bwrite() methods of alpm(4), amdpm(4), and
viapm(4) to only perform a single transaction and not try to use a
loop of multiple transactions for a large request. The framing and
commands to use for a large transaction depend on the upper-layer
protocol (such as SSIF for IPMI over SMBus) from what I can tell, and the
smb(4) driver never allowed bulk read/writes of more than 32-bytes
anyway. The other smb drivers only performed single transactions.
- Fix buffer overflows in the bread() methods of ichsmb(4), alpm(4),
amdpm(4), amdsmb(4), intpm(4), and nfsmb(4).
- Use SMB_xxx errors in viapm(4).
- Destroy ichsmb(4)'s mutex after bus_generic_detach() to avoid problems
from child devices making smb upcalls that would use the mutex during
their detach methods.
MFC after: 1 week
Reviewed by: jmg (mostly)
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unnecessary.
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AMD-8111 SMBus 2.0 controller) are all SMBus 2.0 controllers,
and need another implementation of SMBus access methods, while
this driver supports AMD-756 SMBus 1.0 controller and clones,
including AMD-8111 SMBus 1.0 controller.
Tested by: Vladimir Timofeev (0x006410de),
mezz (0x008410de),
ru (0x00d410de)
All of us got the same(!) nonsense when running ``mbmon -S'',
repeated every four rows.
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SMBus 1.0 and not SMBus 2.0.
AMD-8111 hub (datasheet is publically available) implements both SMBus
2.0 (a separate PCI device) and SMBus 1.0 (a subfunction of the System
Management Controller device with the base I/O address is accessible
through the CSR 0x58). This driver only supports AMD-756 SMBus 1.0
compatible devices.
With the patched sysutils/xmbmon port (to also fix PCI ID and to enable
smb(4) support), I now get:
pciconf:
none0@pci0:7:2: class=0x0c0500 card=0x746a1022 chip=0x746a1022 rev=0x02 hdr=0x00
vendor = 'Advanced Micro Devices (AMD)'
device = 'AMD-8111 SMBus 2.0 Controller'
class = serial bus
subclass = SMBus
amdpm0@pci0:7:3: class=0x068000 card=0x746b1022 chip=0x746b1022 rev=0x05 hdr=0x00
vendor = 'Advanced Micro Devices (AMD)'
device = 'AMD-8111 ACPI System Management Controller'
class = bridge
dmesg:
amdpm0: <AMD 756/766/768/8111 Power Management Controller> port 0x10e0-0x10ff at device 7.3 on pci0
smbus0: <System Management Bus> on amdpm0
# mbmon -A -d
Summary of Detection:
* SMB monitor(s)[ioctl:AMD8111]:
** Winbond Chip W83627HF/THF/THF-A found at slave address: 0x50.
** Analog Dev. Chip ADM1027 found at slave address: 0x5C.
* ISA monitor(s):
** Winbond Chip W83627HF/THF/THF-A found.
I think the confusion comes from the fact that nobody really tried
SMBus with xmbmon :-), since sysutils/xmbmon port doesn't come with
SMBus support enabled, neither in FreeBSD 4, nor in later versions,
so mbmon(1) was just showing the values from the Winbond sensors
accessible through the ISA I/O method (mbmon -I), for me anyway.
On my test machine, the amdpm(4) didn't even attach due to I/O port
allocation failure (who knows what the hell it read from CSR 0x58
of the SMBus 2.0 device :-), which isn't in the CSR space).
I've also checked that lm_sensors.org uses correct PCI ID for SMBus
1.0 of AMD-8111:
i2c-amd756.c: {PCI_VENDOR_ID_AMD, 0x746B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD8111 },
This driver is analogous to our amdpm.c which supports SMBus 1.0
AMD-756 and compatible devices, including SMBus 1.0 on AMD-8111.
i2c-amd8111.c: { 0x1022, 0x746a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
This driver is analogous to nForce-2/3/4, i2c-nforce2.c, which
supports SMBus 2.0, and which our amdpm.c does NOT support
(SMBus 2.0 uses a different, ACPI-unified, API to talk to SMBus).
At least I know for sure it doesn't work with my nForce3. :-)
(The xmbmon port will be fixed to correct the PCI ID too and to
enable the smb(4) support.)
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SMBus busses. Because of limitations in smbus_if.m, the second smbus is
attached to an amdpm1 device that is a child of amdpm0.
Submitted by: Artemiev Igor ai (at) bmc dot brk dot ru
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and amd64. The optimization is a trivial on recent machines.
Reviewed by: -arch (imp, marcel, dfr)
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Submitted by: Mark Santcroos <marks@ripe.net>
Reviewed by: imp, dfr, bde
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we actually use. Originally, the code reserved 0x8000 to 0x80ff inclusive
which on my hardware conflicts with the acpi timer. This broke the amdpm
driver since it was actually given ports 0x800c to 0x810b (which should
not have happened, IMHO).
This also allows us to considerably simplify the handling of the nForce
smb driver, removing the need for a separate nfpm driver. With this, SMB
accesses appear to work on my Tyan Tiger MP board. Your mileage may vary.
In particular, the nForce changes have not been tested.
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PR: 41812
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tree for two or more years now), except in a few places where there's
code to be compatible with older versions of FreeBSD.
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network layer (ether).
- Don't abuse module names to facilitate ifconfig module loading;
such abuse isn't really needed. (And if we do need type information
associated with a module then we should make it explicit and not
use hacks.)
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Add of NVIDIA nForce (nfpm) smbus support.
Obtained from: Thomas D. Dean <tomdean@speakeasy.org>
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also don't use ANSI string concatenation.
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amdpm(4) and smb(4).
This device can be used with userland programs such as sysutils/lmmon
to retrieve sensor information from the motherboard.
PR: kern/23989
Obtained from: Matthew C. Forman <mcf@dmu.ac.uk>
Based on: alpm(4)
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