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path: root/sys/pci/agp_intel.c
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* Remove a bunch of #include "opt_pci.h".mux2002-11-131-1/+0
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* Include <sys/lockmgr.h> for old lock interfaces instead of depending onbde2002-08-271-0/+1
| | | | namespace pollution in <sys/lock.h>.
* - Use more correct values to initialize the AGP controller during setup.jhb2002-07-171-6/+21
| | | | | | The value we use is still questionable for 440BX chipsets. - When flushing the TLB just toggle the bit in question instead of writing a magic value that could trash other unrelated bits.
* Correctly identify the Intel 82830 AGP bridge.benno2002-02-051-0/+3
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* Update to C99, s/__FUNCTION__/__func__/,obrien2001-12-101-4/+4
| | | | also don't use ANSI string concatenation.
* Add support for Intel's i820/i840/i845/i850/i860 chipset.kuriyama2001-11-081-11/+98
| | | | | | Submitted by: nork@cityfujisawa.ne.jp (Norikatsu Shigemura) PR: kern/31559, kern/31825 MFC after: 1 week
* Make these compile again by adding proc.h include for GIANT_REQUIREDjhb2001-07-051-0/+1
| | | | that is in included vm headers.
* Introduce a global lock for the vm subsystem (vm_mtx).alfred2001-05-191-0/+1
| | | | | | | | | | | | | | | | | | | vm_mtx does not recurse and is required for most low level vm operations. faults can not be taken without holding Giant. Memory subsystems can now call the base page allocators safely. Almost all atomic ops were removed as they are covered under the vm mutex. Alpha and ia64 now need to catch up to i386's trap handlers. FFS and NFS have been tested, other filesystems will need minor changes (grabbing the vm lock when twiddling page properties). Reviewed (partially) by: jake, jhb
* Add i815 host to PCI bridge IDache2000-10-201-0/+3
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* A driver for programming the AGP hardware. This is only very lightlydfr2000-06-091-0/+266
tested on Intel BX chipsets only. The other agp minidrivers are totally untested. The programming api is a subset of the Linux api and is only intended to be enough for the X server to use. There is also an in-kernel api for the use of other kernel modules such as the 3D DRI.
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