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* MFS: put debug writes behind boot verbose.imp2001-09-041-7/+16
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* Move to using a chip function + function pointers to deal with theimp2001-09-041-21/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | function and csc interrupt routing path (eg, ISA or PCI) so that we can more easily switch between the two. When we don't have a card ISR, put the function interrupt into ISA mode. This effectively masks the interrupt since it happens once, and not again until we have an ISR. This should help hangs, and might help people that unwisely update the kernel w/o updating pccardd. This is done at mapirq time. Force CL-PD6729/30 to use ISA interrupt routing and maybe even detect the number of pccard slots properly (this is still WIP). We aren't going to support PCI interrupts for this release. A future release should support them, however. Shibata-san's 3.3V fixes are not included. Add a hack which should, in i386, rewrite IRQ 0 cardbus bridges to be IRQ 255, which should cause interrupts to be routed. This is mostly untested since my one tester disappeared after reporting nothing changed. Implement, but do not use, a power method called cardbus. It looked like a great way to get around the 3.3V problem, but it seems that you can only use it to power cardbus cards (I get no CIS when I enable it, so maybe we're programming things bogusly). GC the intr and argp stuff from the slot database. Improve the ToPIC support with the power hacks that Nakagawa-san published in FreeBSD Press and that Hiroyuki Aizu-san ported to -stable. The ToPIC hacks were for 3.3V support in ToPIC 100, but it looks like the '97 also has identical registers, so use them too. Add some #defines for the cardbus power stuff. Finally implement making CSC on the Ricoh chips ISA or PCI. This will allow polling mode to work on vaios, I think. Add some minor debugging. This should likely be cleaned up or put behing a bootverbose. Some of this work, and earlier work, was influanced by Chiharu Shibata-san's power handing patches posted to bsd-nomads:15866. MFC: Soon, if possible.
* The tunable is hw.pcic.irq, but the hw.pcic.override_irq was how it wasimp2001-08-251-2/+1
| | | | reported in sysctl.
* Rearrange how we do interrupt routing tweaking. We now haveimp2001-08-211-6/+6
| | | | | hw.pcic.intr_path {1,2} 1 == ISA, 2 == PCI hw.pcic.init_route Force TI chipset initializations in edge case.
* Merge from stable (which seems to have been spammed at some point in current):imp2001-08-141-2/+7
| | | | | #ifdef the deltap pcic_set_memory_offset argument so that raylink driver works.
* Minor style(9) nits to make code more readableimp2001-08-141-4/+3
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* Treat min,max of 0,0 for IRQ special. Reject it if we didn't specificallyimp2001-08-141-3/+26
| | | | | | | | assing an IRQ. Add better comments while I'm here. MFC after: 1 day # Note: That's merging all the -current pci pcic code, not just this one # change for the Aug 15th code freeze.
* Move ISA interrupt ISR and timeout routines to pcic from pcic_isa soimp2001-08-101-0/+68
| | | | | that we can use them in the pci code when we have to fall back to ISA interrupt routing.
* Now that we are setting a bit in the PCIC_INT_GEN (0x3) register, weimp2001-08-051-2/+2
| | | | | | | | | | | can't blindly write zero into it to disable the card. We must preserve this bit. This changes pcic_disable to only clear the bits we know we need to clear on card disable, thus preserving the magic bit for many TI bridges. This appears to have fixed the problems that people are reporting about the system failing to recognize cards being inserted or removed (or both). Greg: This may fix your problem too :-).
* TI cardbus bridges, 12xx and newer, have an interesting register. Itimp2001-08-011-2/+23
| | | | | | | | | | | | | | | is the diagnostics register at offset 0x93. When bit 5 is set in this register, bits 4-7 in ExCA register 0x5 being 0000 are required for pci interrupt routing. When it is clear, then bit 4 of ExCA register 0x3 is used to enable it. The only other issue is that when you route interrupts this way, you must read ExCA register 0x4 in order to clear the interrupt, else you get an interrupt storm. Deal with this requirement by setting things up. It is believed that this won't hurt other chipsets, but other chipsets may require their own work arounds.
* A bunch of interrupt related cleanup.imp2001-07-311-5/+40
| | | | | | | | | | | | | o Move PIOCSRESOURCE from pccard to pcic so the kernel can give pccardd better hints as to what resources to use. o Implement an undocumented hw.pcic.interrupt_route to allow people that need to do so to route their interrupts in a non-standard way. o Only preallocate a resource in probe if we're routing via pci. o If we aren't routing via pci, then set the irq to use explicitly to defeat the automatic IRQ routing of the pci layer. This, with the pccardd code should be close to what can be committed to -stable.
* Move pcic_override_irq from pcic_isa, to pcic.imp2001-07-311-0/+7
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* It is spelled INTR_FAST in current and INTR_TYPE_FAST in stable, so try toimp2001-07-281-1/+4
| | | | make allowances.
* Stable requires machine/clock.h to quiet warnings. It isn'timp2001-07-281-0/+1
| | | | | | strictly necessary on current, but having it in here makes the diffs with stable smaller and doesn't hurt anything except for phk's redundant include finder.
* Introduce two new tunables from the boot loader.imp2001-07-271-1/+5
| | | | | | | | | | | | | | | | | | | | | | hw.pcic.irq Globally set the IRQ for all pcic devices' management interrupt (aka card status change or CSC interrupt) This is what used to be known as machdep.pccard.pcic_irq (which has been retained for now for compatibility). hw.pcic.ignore_fuction_1 Ignores function 1 for all PCIC bridges by not attaching to them. Lucent released a huge batch of cards that were imporperly manufactuered (lacking the 0 ohm resister to disable slot 1). This is a big hammer to keep those cards from causing problems (I've had 4 people contact me saying my patches worked great once they added a kludge to always ignore function 1, or until they soldered these resistors in place!). No clue where to document these. They act as both boot loader environment variables, as well as read-only sysctls after boot. At the same time, sort sys/systm.h in its proper order after sys/sysctl.h.
* Minor nits merged from my stable tree:imp2001-07-271-0/+1
| | | | | | | | | | | | o kill blank line that I introduced in cardinfo.h o Delete unused variable wasinactive. o return 0 from pccard_resume. o Set the state and lastsate initially to be empty. o move comment above code for interrupt dispatching. o Powerstate interface is now available as of 430002, not 500000 (note that this change will be not 100% correct since the power state stuff didn't enter current until well after 500000, but it is good enough for the two branche we have going now).
* Attempt to fix and document interactions between suspend/resume and pccardcimp2001-07-271-18/+17
| | | | | | | | | | | | | | | | | | | | power x 0. pccardc power x 0 used to disable the slot. But a suspend/resume would reactivate the pccard. It no longer does that. Now the disabling of the slot is sticy until it is reset with power x 1 or the card is ejected. This seems closer to correct behavior to me. o Process all card state changes the same using pccard_do_stat_change(). o Cleanup disabling the card so that we can preserve the state after the change. Basically, don't set it to empty as often as we do. o On suspend, the new state is "empty" and the laststate is "suspend" o Document state machine with a diagram of states and edges. The edges are labeld to tell the reader what event causes the external state changes. o "machdep.pccard.pcic_resume_reset" may be obsolete now. We always call the bridge driver's resume method on resume now. Otherwise cards won't automatically show up. If it needs to stay, I'll add it back.
* Check the state of the slot when we resume. Set it to empty if we noimp2001-07-261-1/+5
| | | | | | | longer have a pccard in the slot. This fixes the problem where pccard would say that a card had been inserted on resume. This also appears to make the insert/remove events more reliable after a resume as well, but that may be a different bug I need to hunt down.
* Clarify some of the 3.3V code with better comments. Also, since theimp2001-07-011-6/+12
| | | | types are treated as a bitfield, test them as such.
* Add comments explaining why we do the somewhat odd irq mapping on PC98imp2001-07-011-0/+7
| | | | machines with C-BUS cards.
* Minor whitespace nit.imp2001-07-011-1/+1
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* Work around a bug in the current interrupt system by explicitlyimp2001-06-251-0/+4
| | | | | | | | | | | | rejecting INTR_FAST interrupts. Since they can't be shared anyway, this just short circuits a failure case that should work but is panic fodder now. This bug is that if the interrut condiation is active when you activate the interrupt, then the interrupt routine will be called. jhb had a patch that may or may not work to fix it, but I've lost it. This may be due to the sio probe doing something odd too.
* Save the IRQ that we get in pci attachment.imp2001-06-161-1/+5
| | | | | | | | | | | Print type of pci bridge we find. Force the IRQ of pci bridges upon all its children. Allocate the resources on behalf of the bridge when we're testing to see if they exist. This should help people who don't read updating instructions very well. This patch started out with an idea from Shigeru Yamamoto-san in -current.
* On PC-98, map IRQ 6 to IRQ 7 at the pcic level. That is, when we'reimp2001-06-161-0/+12
| | | | | | | | | | | | told to use IRQ 6, progam the pcic to use irq 7 instead. Evidentally, at least some of the cards are wired this way. If you want to use irq 6, configure it. All the mapping is done just before we set the interrupt registers. See [FreeBSD98-testers 5064] for details. Added commentary about valid interrupts on some CBUS pc98 CL PD6722 based cards. Submitted by: Hiroshi TSUKADA-san <hiroshi@kiwi.ne.jp>
* Move the pcic interrupt from pcic.c to pcic_isa.c. The ISA handlingimp2001-06-041-127/+17
| | | | | | | | | | | | | | for card change interrupts is different than the pci stuff that's coming soon. Set the management irq in different ways. If pci_parallel interrutp routing, then use the PCI way of getting interrupts. Move polling mode into pcic_isa since when we're routing via pci polling doesn't work because many bridges (systems hang solid). If we're routing interrupts via pci, they can be shared, so flag them as such. Note, this doesn't actually change anything since the pci attachment isn't quite ready to be committed.
* Turns out that one bit isn't enough. Introduce two new fieldsimp2001-05-281-1/+17
| | | | | | | | | | | | | | csc_route and func_route to hold the way that each interrupt is routed. csc is Card Status Change in the datasheets and standard, but is called "Management Interrupt" in FreeBSDese. There are three types of interrupt routing: ISA parallel, PCI parallel and ISA serial (some chipsets support other types as well, but I don't plan on supporting them). When we try to allocate an interrupt, and the type for that interrupt is pci_parallel, allow it to be shared by oring in RF_SHAREABLE to the flags argument. Introduce pcic_alloc_resource to allow this to happen.
* Allow a shareable interrupts. Note, the bridge must set this flag orimp2001-05-271-15/+15
| | | | | | | | the irq will be unshareable, as things are now. More work likely is needed, but this is a good checkpoint. # pcic_pci.c is getting closer :-)
* Migrate from unit based to dev base. Don't save unit number, but do saveimp2001-05-251-2/+2
| | | | | dev. Convert all uses of unit to dev as appropriate. Minor comment fixes to pcic_softc definition.
* Add intrack field to each slot. This can be used to acknowledgeimp2001-05-251-0/+3
| | | | | | | interrupts on other buses. Right now it isn't used, but will be for the pci attachment. # Add copyright by me for this year since I've changed so much.
* Minor name space issues.imp2001-05-251-19/+20
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* Use bus_space functions rather than inb/outb.imp2001-05-241-4/+9
| | | | | | | Add defines for PCIC_INDEX and PCIC_DATA offsets. Change PCIC_INDEX_0 to PCIC_PORT_0 Add define for PCIC_NPORT. Document why the vadem probe works.
* Move getb1 and putb1 from pcic_isa.c to pcic.c. Rename them toimp2001-05-241-0/+20
| | | | | | pcic_{get,put}b_io. There are some pci bridges (the CL-PD6729 and maybe others) that do not have memory mapped registers, so we'll need these in both places. Declare them in pcicvar.h.
* Add better support for the Ricoh 5C296 and 5C396 chips. These chipsimp2001-05-231-0/+6
| | | | | | have a slightly different 3.3V support than the other clones, so compensate as best we can. Note: 3.3V support is untested since I do not have any 3.3V cards that I know of to test it with.
* Move allocation of ExCA registers from the base driver into the busimp2001-05-211-26/+1
| | | | attachment code.
* Move setting of Vcc bit to before the vcc switch statement. Theimp2001-05-211-7/+5
| | | | | datasheets I have seem to indicate that generally this bit is viewed as a toggle. Correct comments to match code.
* Next step on the road to pci: power taming.imp2001-05-211-67/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Work through the various power commands and convert them from a "is this a foo controller or a foo' controller or a foo''' controller" to a cabability based scheme. We have bits in the softc that tell us what kind of power control scheme the controller uses, rather than relying on being able to enumerate them all. Cardbus bridges are numerous, but nearly all implement the i82365sl-DF scheme (well, a few implement cirrus CL-PD67xx, but those were made by Cirrus Logic!). Add a pointer back to the softc in each pcic_slot so we can access these flags. Add comments that talk about the issues here. Also note in passing that there are two differ Vpp schemes in use and that we may need to adjust the code to deal with both of them. Note why it usually works now. We have 5 power management modes right now: KING, AB, DF, PD and VG. AB is for the i82365 stpes A, B and C. DF is for step DF. PD is the cirrus logic extensions for 3.3V while VG is the VADEM extensions for 3.3V. KING is for the IBM KING controller found on some old cards. # I'm looking for one of those old cards or a laptop that has the KING # bridge in it. We have to still cheat and treat the AB parts like the DF parts because pci isn't here yet. As far as I can tell, this is harmless for actual old parts and necessary to work with 3.3V cards in some laptops. This almost eliminates all tests for controller in the code. There are still a few unrelated to power that need taming as well.
* Next step towards pcic_pci: the ability to allocate mapped memory in attach.imp2001-05-211-11/+56
| | | | | | | | | | | | | | | | | | | o Introduce flags word to the softc. This will be used to control various aspects of the driver. Right now there are two bits defined, PCIC_IO_MAPPED and PCIC_MEM_MAPPED. One for ISA cards that are I/O mapped, the other is for PCI cards that are memory mapped. Only the ISA side is implemented with this commit. o Introduce a pcic_dealloc which will cleanly dealloc resources used. Right now it is only supported when called from probe/attach. o Keep track of resources allocated in the pcic_softc. o move pcictimeout_ch to the softc so we can support multiple devices in polling mode. o In ISA probe, set PCIC_IO_MAPPED. o Introduce and compute the slot mask. This will be used later when we expand the number of slots on ISA from 2 to 4. In such a case, we appear to have to use polling mode otherwise we get two different cards trying to drive the same interrupt line. I don't have hardware to test this configuration, so I'll stop here.
* Two comments and one bug fix:imp2001-05-211-3/+13
| | | | | | | | | | o Add defines for the VS[12]# bits in register 0x16. o Add comment about what we're doing reading register 0x16 (PCIC_CDGC) in the DF case. o Check bit VS1# rather than a random bit I was checking due to a bogus transcrition on my part from nakagawa-san's article. o Add note about IBM KING and 3.3V operation from information larned from wildboard.
* Add back the plain i82365 to the list of bridges that do specialimp2001-05-191-0/+1
| | | | | | | | | things to get 3.3V. It appears that some cardbus chipsets have id registers that say they are C step parts, but they really support the DF step 3.3V functionality. # Need to verify that IBM KING is handled properly since the MISC1 # register is really a cirrus logic only register.
* Initialize cinfo structure at compile time rather than run time sinceimp2001-05-191-16/+13
| | | | they are now constant.
* Now that we've moved the mecia support out of pcic.c to its ownimp2001-05-191-12/+12
| | | | | driver, we no longer need to go through the cinfo.XXXX indirections. restore the direct calls that were replaced earlier.
* Move ISA specific code into pcic_isa. This is the probe routine, theimp2001-05-191-259/+39
| | | | | get/setb1 routines. Also expose clrb and setb as pcic_{clrb,setb} so we can use it from the probe. pcic_probe is no longer needed.
* It turns out that Intel's i82365sl-DF step has the same ID as the VLSIimp2001-05-191-27/+59
| | | | | | | | | | | | | | | | | | | | | | | | | 82C146. The Intel i82365SL-DF supports 3.3V cards. The Step A/B/C parts do not appear to support this. This is hard to know for sure since it was deduced from "compatible" parts' data sheets and the article mentioned below. Rework the VLSI detection to be a little nicer and not depend on scanning cards twice. This would allow bad VLSI cards to coexist with a good intel card, for example. We now detect i82365SL-DF cards where before we'd detect a VLSI. For the most part, this is good, but we run a small chance of detecting a single slot 82C146 as a i82365SL-DF. Since I can't find a datasheet for the 82c146, I don't know if this is a problem or not. This work is based on an excellent article, in Japanese, by NAKAGAWA, Yoshihisa-san that appeared in FreeBSD Press Number 4. He provided a patch against PAO3 in his article. Since the pcic.c code has changed some since then, I've gone ahead and cleaned up his patch somewhat and changed how the code detects the buggy '146 cards. I also removed the comment asking if there were other cards that matched the 82C146 since we found one and additional information isn't necessary.
* Separate out isa attachment to its own file. The pci attachment willimp2001-05-161-84/+12
| | | | | | | | | | | soon attach directly to pcic rather than the kludge pci-pcic device we have now. In some ways, this is similar to the work PAO3 did to try to support cardbus bridges. In some ways different. This and future commits will be taking from the spirit of many of those changes. pcicvar.h is completely different from the pcicvar.h that appeared in PAO3, but similar in concept.
* The mecia support has moved to the mecia driver, so remove the copy ofimp2001-05-151-351/+35
| | | | it here.
* {G,S}ET_UNIT are now unused, gc themimp2001-05-151-3/+0
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* It turns out that pcic_slot::slotnum was really unused, so don't setimp2001-05-141-2/+0
| | | | it.
* Remove static array of slots. We now have state information for eachimp2001-05-141-17/+24
| | | | | slot in a softc for each unit that we probe. Also remove validunits static, since it is no longer necessary.
* Fix the so called "static bug" in polling mode. Some desktop cardsimp2001-05-141-6/+33
| | | | | | | | | | | | | | | | | | | | | | | | have bad grounding characteristics which allow small static discharges (or sunspots, we're not 100% sure which) to reach the bridge chip. This causes the bridge chip to wedge/reset itself. There's no known cure short of rebooting. The bug manifests itself by the STAT_CHG return 0xff when read. This is impossible because the upper bits are reserved (and therefore zero). In addition, some of the lower bits are one only for memory cards, which OLDCARD doesn't support, so if they are set, something seriously foobar'd is going on. So far we've seen this in exactly one brand of pcmcia <-> isa bridge which plug and play identifies only as "VIA PCMCIA CARD". This card just has buffers on the isa card and the actual bridge chip on the remote slot, which is connected by long ribbon cables. We think this long cable run, coupled with the lack of coupling capacitors is a major reason why it is so static sensitive while its bretheren aren't. Work Supported by: Timing Solutions, Inc. MFC After: 3 days
* When activating or deactivating a resource, only attempt to deal withimp2001-05-141-0/+8
| | | | | | | | | | the resource activation if we're dealing with our grandchild. Otherwise, we run into two problems. One, if the pccard layer wanted to allocate and activate something, we'd wind up trying to do the wrong thing twice: the ivars are wrong and we don't want the bridge to map the resource to the slot. If we're more than a grandchild, then who knows what kind of ivar is present. In either of these cases, we just pass it up the food chain.
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