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* MFC r276428:neel2015-06-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace bhyve's minimal RTC emulation with a fully featured one in vmm.ko. MFC r276432: Initialize all fields of 'struct vm_exception exception' before passing it to vm_inject_exception(). MFC r276763: Clear blocking due to STI or MOV SS in the hypervisor when an instruction is emulated or when the vcpu incurs an exception. MFC r277149: Clean up usage of 'struct vm_exception' to only to communicate information from userspace to vmm.ko when injecting an exception. MFC r277168: Fix typo (missing comma). MFC r277309: Make the error message explicit instead of just printing the usage if the virtual machine name is not specified. MFC r277310: Simplify instruction restart logic in bhyve. MFC r277359: Fix a bug in libvmmapi 'vm_copy_setup()' where it would return success even if the 'gpa' was in the guest MMIO region. MFC r277360: MOVS instruction emulation. MFC r277626: Add macro to identify AVIC capability (advanced virtual interrupt controller) in AMD processors. MFC r279220: Don't close a block context if it couldn't be opened avoiding a null deref. MFC r279225: Add "-u" option to bhyve(8) to indicate that the RTC should maintain UTC time. MFC r279227: Emulate MSR 0xC0011024 when running on AMD processors. MFC r279228: Always emulate MSR_PAT on Intel processors and don't rely on PAT save/restore capability of VT-x. This lets bhyve run nested in older VMware versions that don't support the PAT save/restore capability. MFC r279540: Fix warnings/errors when building vmm.ko with gcc.
* MFC r273683neel2014-12-301-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the ACPI PM timer emulation into vmm.ko. MFC r273706 Change the type of the first argument to the I/O emulation handlers to 'struct vm *'. MFC r273710 Add a comment explaining the intent behind the I/O reservation [0x72-0x77]. MFC r273744 Add foo_genassym.c files to DPSRCS so dependencies for them are generated. This ensures these objects are rebuilt to generate an updated header of assembly constants if needed. MFC r274045 If the start bit, PxCMD.ST, is cleared and nothing is in-flight then PxCI, PxSACT, PxCMD.CCS and PxCMD.CR should be 0. MFC r274076 Improve the ability to cancel an in-flight request by using an interrupt, via SIGCONT, to force the read or write system call to return prematurely. MFC r274330 To allow a request to be submitted from within the callback routine of a completing one increase the total by 1 but don't advertise it. MFC r274931 Change the lower bound for guest vmspace allocation to 0 instead of using the VM_MIN_ADDRESS constant. MFC r275817 For level triggered interrupts clear the PIC IRR bit when the interrupt pin is deasserted. MFC r275850 Fix 8259 IRQ priority resolver. MFC r275952 Various 8259 device model improvements. MFC r275965 Emulate writes to the IA32_MISC_ENABLE MSR.
* MFC r273375neel2014-12-301-4/+24
| | | | | | | | | | | | | | | | | | | | | | Add support AMD processors with the SVM/AMD-V hardware extensions. MFC r273749 Remove bhyve SVM feature printf's now that they are available in the general CPU feature detection code. MFC r273766 Add missing 'break' pointed out by Coverity CID 1249760. MFC r276098 Allow ktr(4) tracing of all guest exceptions via the tunable "hw.vmm.trace_guest_exceptions" MFC r276392 Inject #UD into the guest when it executes either 'MONITOR' or 'MWAIT' on an AMD/SVM host. MFC r276402 Remove "svn:mergeinfo" property that was dragged along when these files were svn copied in r273375.
* MFC 261321neel2014-12-301-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | Rename the AMD MSR_PERFCTR[0-3] so the Pentium Pro MSR_PERFCTR[0-1] aren't redefined. MFC r273214 Fix build to not bogusly always rebuild vmm.ko. MFC r273338 Add support for AMD's nested page tables in pmap.c: - Provide the correct bit mask for various bit fields in a PTE (e.g. valid bit) for a pmap of type PT_RVI. - Add a function 'pmap_type_guest(pmap)' that returns TRUE if the pmap is of type PT_EPT or PT_RVI. Add CPU_SET_ATOMIC_ACQ(num, cpuset): This is used when activating a vcpu in the nested pmap. Using the 'acquire' variant guarantees that the load of the 'pm_eptgen' will happen only after the vcpu is activated in 'pm_active'. Add defines for various AMD-specific MSRs. Discussed with: kib (r261321)
* MFC r270326neel2014-12-281-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a recursive lock acquisition in vi_reset_dev(). MFC r270434 Return the spurious interrupt vector (IRQ7 or IRQ15) if the atpic cannot find any unmasked pin with an interrupt asserted. MFC r270436 Fix a bug in the emulation of CPUID leaf 0x4. MFC r270437 Add "hw.vmm.topology.threads_per_core" and "hw.vmm.topology.cores_per_package" tunables to modify the default cpu topology advertised by bhyve. MFC r270855 Set the 'inst_length' to '0' early on before any error conditions are detected in the emulation of the task switch. If any exceptions are triggered then the guest %rip should point to instruction that caused the task switch as opposed to the one after it. MFC r270857 The "SUB" instruction used in getcc() actually does 'x -= y' so use the proper constraint for 'x'. The "+r" constraint indicates that 'x' is an input and output register operand. While here generate code for different variants of getcc() using a macro GETCC(sz) where 'sz' indicates the operand size. Update the status bits in %rflags when emulating AND and OR opcodes. MFC r271439 Initialize 'bc_rdonly' to the right value. MFC r271451 Optimize the common case of injecting an interrupt into a vcpu after a HLT by explicitly moving it out of the interrupt shadow. MFC r271888 Restructure the MSR handling so it is entirely handled by processor-specific code. MFC r271890 MSR_KGSBASE is no longer saved and restored from the guest MSR save area. This behavior was changed in r271888 so update the comment block to reflect this. MFC r271891 Add some more KTR events to help debugging. MFC r272197 mmap(2) requires either MAP_PRIVATE or MAP_SHARED for non-anonymous mappings. MFC r272395 Get rid of code that dealt with the hardware not being able to save/restore the PAT MSR on guest exit/entry. This workaround was done for a beta release of VMware Fusion 5 but is no longer needed in later versions. All Intel CPUs since Nehalem have supported saving and restoring MSR_PAT in the VM exit and entry controls. MFC r272670 Inject #UD into the guest when it executes either 'MONITOR' or 'MWAIT'. MFC r272710 Implement the FLUSH operation in the virtio-block emulation. MFC r272838 iasl(8) expects integer fields in data tables to be specified as hexadecimal values. Therefore the bit width of the "PM Timer Block" was actually being interpreted as 50-bits instead of the expected 32-bit. This eliminates an error message emitted by a Linux 3.17 guest during boot: "Invalid length for FADT/PmTimerBlock: 50, using default 32" MFC r272839 Support Intel-specific MSRs that are accessed when booting up a linux in bhyve: - MSR_PLATFORM_INFO - MSR_TURBO_RATIO_LIMITx - MSR_RAPL_POWER_UNIT MFC r273108 Emulate "POP r/m". This is needed to boot OpenBSD/i386 MP kernel in bhyve. MFC r273212 Support stopping and restarting the AHCI command list via toggling PxCMD.ST from '1' to '0' and back. This allows the driver a chance to recover if for instance a timeout occurred due to activity on the host.
* MFC 259942,262274,263035,263054,263211,263744,264179,264324,264468,264631,jhb2014-07-191-0/+3
| | | | | 264648,264650,264651,266572,267558: Flesh out the AT PIC and 8254 PIT emulations and move them into the kernel.
* MFC 257422,257661,258075,258476,258494,258579,258609,258699:jhb2014-01-231-1/+2
| | | | | | | | | | Several enhancements to the I/O APIC support in bhyve including: - Move the I/O APIC device model from userspace into vmm.ko and add ioctls to assert and deassert I/O APIC pins. - Add HPET device emulation including a single timer block with 8 timers. - Remove the 'vdev' abstraction. Approved by: neel
* Fix 'make depend'.uqs2013-08-211-3/+3
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* Corral all the host state associated with the virtual machine into its own file.neel2012-10-291-0/+1
| | | | | | | This state is independent of the type of hardware assist used so there is really no need for it to be in Intel-specific code. Obtained from: NetApp
* Add support for trapping MMIO writes to local apic registers and emulating them.neel2012-09-251-0/+1
| | | | | The default behavior is still to present the local apic to the guest in the x2apic mode.
* BHyVe's vmm.ko can now be built with the in-tree binutils.grehan2012-07-111-5/+0
| | | | Many thanks to jhb@ for making this happen.
* Missed this in the previous commit to add 'show vmcs': add opt_ddb.h asjhb2011-06-021-1/+1
| | | | a source file.
* Remove misleading macro definition (-DOLD_BINUTILS) from CFLAGS.neel2011-05-171-1/+0
| | | | | | | At this point we require binutils from ports that understands how to assemble the VT-x instructions. Discussed with: grehan@
* First cut at porting the kernel portions of 221828 and 221905 from thejhb2011-05-141-2/+2
| | | | BHyVe reference branch to HEAD.
* Import of bhyve hypervisor and utilities, part 1.grehan2011-05-131-0/+66
vmm.ko - kernel module for VT-x, VT-d and hypervisor control bhyve - user-space sequencer and i/o emulation vmmctl - dump of hypervisor register state libvmm - front-end to vmm.ko chardev interface bhyve was designed and implemented by Neel Natu. Thanks to the following folk from NetApp who helped to make this available: Joe CaraDonna Peter Snyder Jeff Heller Sandeep Mann Steve Miller Brian Pawlowski
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