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* Allow callers of OF_decode_addr to get the size of the found mapping. Thisandrew2016-02-161-1/+5
| | | | | | | | | | | | | | will allow for code that uses the old fdt_get_range and fdt_regsize functions to find a range, map it, access, then unmap to replace this, up to and including the map, with a call to OF_decode_addr. As this function should only be used in the early boot code the unmap is mostly do document we no longer need the mapping as it's a no-op, at least on arm. Reviewed by: jhibbits Sponsored by: ABT Systems Ltd Differential Revision: https://reviews.freebsd.org/D5258
* POSIX states that #include <signal.h> shall make both mcontext_t andkib2016-02-121-5/+5
| | | | | | | | | | | | | | | | | | | | ucontext_t available. Our code even has XXX comment about this. Add a bit of compliance by moving struct __ucontext definition into sys/_ucontext.h and including it into signal.h and sys/ucontext.h. Several machine/ucontext.h headers were changed to use namespace-safe types (like uint64_t->__uint64_t) to not depend on sys/types.h. struct __stack_t from sys/signal.h is made always visible in private namespace to satisfy sys/_ucontext.h requirements. Apparently mips _types.h pollutes global namespace with f_register_t type definition. This commit does not try to fix the issue. PR: 207079 Reported and tested by: Ting-Wei Lan <lantw44@gmail.com> Sponsored by: The FreeBSD Foundation MFC after: 2 weeks
* Include the correct header to get a phandle_t needed by ofw_bus_if.h. Whileandrew2016-02-111-3/+1
| | | | | | here only include opt_platform.h once. Sponsored by: ABT Systems Ltd
* Make bus_space_generic properly map/unmap memory (using pmap_mapdev andadrian2016-02-112-13/+24
| | | | | | | | | | | | | | | pmap_unmapdev respectively) so that resources are properly managed. This is work originally done by kan@. Stanislav picked it up as part of his Mediatek SoC work. Tested: * Carambola2, AR933x SoC Submitted by: Stanislav Galabov <sgalabov@gmail.com> Reviewed by: kan Differential Revision: https://reviews.freebsd.org/D5184
* Migrate the other MIPS24K SoC cores to use the CPU_MIPS24K option.adrian2016-02-114-4/+4
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* Missing commit - remove MIPS fdt bus space.adrian2016-02-111-1/+0
| | | | Differential Revision: https://reviews.freebsd.org/D5184
* Remove bus space fdt for MIPS.adrian2016-02-112-206/+1
| | | | | | | | This was originall done by kan@. Submitted by: Stanislav Galabov <sgalabov@gmail.com> Reviewed by: kan Differential Revision: https://reviews.freebsd.org/D5184
* Convert MIPS nexus and mips_pic to BUS_PASSadrian2016-02-112-3/+6
| | | | | | Submitted by: Stanislav Galabov <sgalabov@gmail.com> Reviewed by: kan Differential Revision: https://reviews.freebsd.org/D5196
* Teach the MIPS ticker to attach itself properly when using INTRNG.adrian2016-02-111-0/+11
| | | | | | Submitted by: Stanislav Galabov <sgalabov@gmail.com> Reviewed by: kan Differential Revision: https://reviews.freebsd.org/D5183
* Begin the MIPS_INTRNG support.adrian2016-02-115-2/+679
| | | | | | | | | | | | | | | | | | | | | | | | | | This is a prelude to intr-ng support for MIPS boards that need it - notably the CI20 port from kan@ that's upcoming, but also work that Stanislav is doing for the Mediatek platforms. This is the initial platform dependent bits in include/intr.h, some #defines for the nexus code for the intrng initialisation/runtime bits, some changed naming (which I'll fix later to be the same, much like what I did for ARM intr-ng) in exception.S, and the first cut at a PIC. Stanislav and I refactored out the common code for intrng support, so the mips intrng definitions are quite small (sys/mips/include/intr.h.) This is all work done by kan@, which stanislav has been cherry picking into common code for his mediatek chipset work. Tested: * Carambola2 - no regressions (not intr-ng though!) Submitted by: Stanislav Galabov <sgalabov@gmail.com> Reviewed by: kan (original author) Differential Revision: https://reviews.freebsd.org/D5182
* Include sys/_task.h into uma_int.h, so that taskqueue.h isn't aglebius2016-02-092-2/+0
| | | | | | requirement for uma_int.h. Suggested by: jhb
* Fix build.br2016-02-041-0/+1
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* Fix build.glebius2016-02-041-0/+1
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* Use MIPS24K now.adrian2016-02-021-1/+1
| | | | | Submitted by: Stanislav Galabov <sgalabov@gmail.com> Differential Revision: https://reviews.freebsd.org/D5079
* Use CPU_MIPS24K now in AR933x based boards.adrian2016-02-021-1/+1
| | | | | | | | I'll flip on other boards as i test them. Tested: * AR9331, Carambola 2
* Move MIPS32 Release 2 and Release 3 CPUs to use the EHB instruction foradrian2016-02-021-5/+27
| | | | | | | | | | | | | | | | clearing hazards. This revision makes currently known MIPS32 Release 2 and Release 3 CPUs use the EHB instruction when clearing hazards. So far the MIPS 74K and MIPS1004K (somewhat) were already using the EHB. Now we add more r2 and r3 CPUs to this list. Also, for the cases of MIPS coherent processing systems (currently 1004K, 1074K, interAptiv and proAptiv) - define proper CCA attributes. Submitted by: Stanislav Galabov <sgalabov@gmail.com> Reviewed by: imp Differential Revision: https://reviews.freebsd.org/D5078
* Rename some CPU_MIPSxxx options and add new CPU_MIPSxxx optionsadrian2016-02-025-7/+7
| | | | | | | | | | | | | | | | | | | | | | | This revision does the following renames: CPU_MIPS24KC -> CPU_MIPS24K CPU_MIPS74KC -> CPU_MIPS74K CPU_MIPS1004KC -> CPU_MIPS1004K It also adds the following new CPU_MIPSxxx options: CPU_MIPS24KE, CPU_MIPS34K, CPU_MIPS1074K, CPU_INTERAPTIV, CPU_PROAPTIV CPU_MIPSxxxxKC is limiting and possibly misleading as it implies the MIPSxxxxK CPU has no FPU. It would be better if the CPUs are named after their standard functionalities only and the presence or absence of FPU can then be controlled via the CPU_HAVEFPU option. I will send out another dependent revision that moves MIPS 32 r2 and r3 CPUs to use the EHB instruction for clearing hazards instead of NOP/SSNOP. Submitted by: Stanislav Galabov <sgalabov@gmail.com> Reviewed by: imp Differential Revision: https://reviews.freebsd.org/D5077
* EHCI: Make core reset and port speed reading more generic.mmel2016-01-281-1/+20
| | | | | | | | | | | | | | | | | Use driver settable callbacks for handling of: - core post reset - reading actual port speed Typically, OTG enabled EHCI cores wants setting of USBMODE register, but this register is not defined in EHCI specification and different cores can have it on different offset. Also, for cores with TT extension, actual port speed must be determinable. But again, EHCI specification not covers this so this patch provides function for two most common variant of speed bits layout. Reviewed by: hselasky Differential Revision: https://reviews.freebsd.org/D5088
* Convert ss_sp in stack_t and sigstack to void *.jhb2016-01-273-3/+3
| | | | | | | | | | | | POSIX requires these members to be of type void * rather than the char * inherited from 4BSD. NetBSD and OpenBSD both changed their fields to void * back in 1998. No new build failures were reported via an exp-run. PR: 206503 (exp-run) Reviewed by: kib MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D5092
* Convert rman to use rman_res_t instead of u_longjhibbits2016-01-2727-52/+55
| | | | | | | | | | | | | | | | | | | | Summary: Migrate to using the semi-opaque type rman_res_t to specify rman resources. For now, this is still compatible with u_long. This is step one in migrating rman to use uintmax_t for resources instead of u_long. Going forward, this could feasibly be used to specify architecture-specific definitions of resource ranges, rather than baking a specific integer type into the API. This change has been broken out to facilitate MFC'ing drivers back to 10 without breaking ABI. Reviewed By: jhb Sponsored by: Alex Perez/Inertial Computing Differential Revision: https://reviews.freebsd.org/D5075
* Add a comment about why at is turned off in the exception handler.imp2016-01-261-0/+6
| | | | | | Only k0 and k1 may be touched until we save registers somewhere. MFC After: 2 days
* Remove a duplicate setting of the AH_DEBUG_ALQ option.markj2016-01-261-1/+0
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* Stop calling fdt_immr_addr from the xlp startup code. It's used to setandrew2016-01-221-2/+0
| | | | fdt_immr_{va,pa,size}, but these are not used outside a single ARM SoC.
* Shift saved floating point registers up in jmp_buf.brooks2016-01-201-14/+15
| | | | | | | | sigmask_t is 128-bits so requires two slots. Approved by: CheriBSD (93699cb9b6e73980ac369e379cea9772c9494ccc) MFC after: 1 week Sponsored by: DARPA, AFRL
* Implement vsyscall hack. Prior to 2.13 glibc uses vsyscalldchagin2016-01-092-0/+3
| | | | | | | | | instead of vdso. An upcoming linux_base-c6 needs it. Differential Revision: https://reviews.freebsd.org/D1090 Reviewed by: kib, trasz MFC after: 1 week
* Make the 'env' directive described in config(5) work on all architectures,ian2016-01-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | providing compiled-in static environment data that is used instead of any data passed in from a boot loader. Previously 'env' worked only on i386 and arm xscale systems, because it required the MD startup code to examine the global envmode variable and decide whether to use static_env or an environment obtained from the boot loader, and set the global kern_envp accordingly. Most startup code wasn't doing so. Making things even more complex, some mips startup code uses an alternate scheme that involves calling init_static_kenv() to pass an empty buffer and its size, then uses a series of kern_setenv() calls to populate that buffer. Now all MD startup code calls init_static_kenv(), and that routine provides a single point where envmode is checked and the decision is made whether to use the compiled-in static_kenv or the values provided by the MD code. The routine also continues to serve its original purpose for mips; if a non-zero buffer size is passed the routine installs the empty buffer ready to accept kern_setenv() values. Now if the size is zero, the provided buffer full of existing env data is installed. A NULL pointer can be passed if the boot loader provides no env data; this allows the static env to be installed if envmode is set to do so. Most of the work here is a near-mechanical change to call the init function instead of directly setting kern_envp. A notable exception is in xen/pv.c; that code was originally installing a buffer full of preformatted env data along with its non-zero size (like mips code does), which would have allowed kern_setenv() calls to wipe out the preformatted data. Now it passes a zero for the size so that the buffer of data it installs is treated as non-writeable.
* Fix missing path conversion from the previous commit to shuffle mdio around.adrian2015-12-271-1/+1
| | | | | It turns out the recent work to cut down the number of atheros kernels built didnt include one with ARGE_MDIO defined..
* Fix typo (s/harware/hardware/)kevlo2015-12-251-1/+1
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* Add initial configuration files for the MT7620 and RT5350 SoCs.adrian2015-12-254-0/+452
| | | | | | | | These are all works in progress. Notably - no wifi support just yet! I've booted the MT7620 on a TP-Link Archer C2 via tftpboot. Submitted by: Stanislav Galabov <sgalabov@gmail.com>
* Add missing device rename.adrian2015-12-241-1/+1
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* [rt305x] Add initial RT5350 and MT7620 glue.adrian2015-12-247-71/+105
| | | | | | | | | | | | | | | | * Add in chipset awareness to the obio bus layout (ie, which devices are where); * Add in some USB OTG changes to be aware of the newer stuff; * Add in a configurable primary console - some chips use the normal UART, some use UARTLITE. Tested (by Stanislav); * RT3050 (NFS) * RT5350 (NFS, MFS) * MT7620 (USB) Submitted by: Stanislav Galabov <sgalabov@gmail.com>
* [MT7620] add ehci/ohci USB support.adrian2015-12-242-0/+490
| | | | | | The newer chips don't use OTG; they're more traditional USB. Submitted by: Stanislav Galabov <sgalabov@gmail.com>
* [MT7620] add SPI device support.adrian2015-12-241-0/+350
| | | | Submitted by: Alexander A. Mityaev <sansan@adm.ua>
* [rt305x] add PCI bus / resource allocation code for the MT7620.adrian2015-12-242-0/+1031
| | | | | | This is based on the sys/arm/mv/ pci resource/allocation code. Submitted by: Stanislav Galabov <galabov@gmail.com>
* [rt305x] add register space definitions for later generation chips.adrian2015-12-241-12/+176
| | | | | | This adds definitions for the MT5350 and MT7620 SoCs. Submitted by: Stanislav Galabov <galabov@gmail.com>
* [rt305x] Prepare for the upcoming regime change - add RT305x options.adrian2015-12-241-0/+3
| | | | Submitted by: Stanislav Galabov <sgalabov@gmail.com>
* Begin the initial support for the mips1004kc core.adrian2015-12-242-2/+14
| | | | | | | | | | | | | * add build option; * add initial coherence manager config register bits; * use the right hazard instruction (ehb); * add page attributes. Tested: * MT7621A SoC (not yet in-tree) Submitted by: Stanislav Galabov <sgalabov@gmail.com>
* Add missing \n.adrian2015-12-241-1/+1
| | | | | | | | | | | | | | | | | | | | | Otherwise you end up with: Cache info: picache_stride = 4096 picache_loopcount = 16 pdcache_stride = 4096 pdcache_loopcount = 8 cpu0: MIPS Technologies processor v80.150 MMU: Standard TLB, 32 entries (4K 16K 64K 256K 1M 16M 64M 256M pg sizes) L1 i-cache: 4 ways of 512 sets, 32 bytes per line L1 d-cache: 4 ways of 256 sets, 32 bytes per line L2 cache: disabled Config1=0xbee3519e<PerfCount,WatchRegs,MIPS16,EJTAG> Config2=0x80000000 Config3=0x2420 Tested: * MT7620 SoC
* [mips] Add TLB pagemask probing code, and print out the allowable page sizes.adrian2015-12-223-1/+46
| | | | | | This is from Stacey's work on larger kernel stack sizes for MIPS. Thanks! Submitted by: sson
* Add a mips implementation of OF_decode_addr().ian2015-12-211-0/+70
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* [mips] print out l2 cache configuration if it exists.adrian2015-12-211-0/+13
| | | | | | | | | | | | | | | | | | | The Ingenic JZ7480 SoC that is on the Imagination Technologies CI20 board has an L2 cache: Cache info: picache_stride = 4096 picache_loopcount = 8 pdcache_stride = 4096 pdcache_loopcount = 8 cpu0: Ingenic Xburst processor v79.2 MMU: Standard TLB, 32 entries L1 i-cache: 8 ways of 128 sets, 32 bytes per line L1 d-cache: 8 ways of 128 sets, 32 bytes per line L2 cache: 8 ways of 256 sets, 128 bytes per line, 256 KiB total size Config1=0xbe67338b<WatchRegs,EJTAG,FPU> Config2=0x80000267 Config3=0x20
* Tidy up mips ofw_machdep.h. Don't include openfirm.h because openfirm.hian2015-12-201-3/+0
| | | | | | is what includes machine/ofw_machdep.h. Don't declare OF_decode_addr(); it isn't implemented yet on mips and the declaration for it is about to be commonized into openfirm.h.
* Introduce a new mechanism for relocating virtual pages to a new physicalalc2015-12-193-14/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | address and use this mechanism when: 1. kmem_alloc_{attr,contig}() can't find suitable free pages in the physical memory allocator's free page lists. This replaces the long-standing approach of scanning the inactive and inactive queues, converting clean pages into PG_CACHED pages and laundering dirty pages. In contrast, the new mechanism does not use PG_CACHED pages nor does it trigger a large number of I/O operations. 2. on 32-bit MIPS processors, uma_small_alloc() and the pmap can't find free pages in the physical memory allocator's free page lists that are covered by the direct map. Tested by: adrian 3. ttm_bo_global_init() and ttm_vm_page_alloc_dma32() can't find suitable free pages in the physical memory allocator's free page lists. In the coming months, I expect that this new mechanism will be applied in other places. For example, balloon drivers should use relocation to minimize fragmentation of the guest physical address space. Make vm_phys_alloc_contig() a little smarter (and more efficient in some cases). Specifically, use vm_phys_segs[] earlier to avoid scanning free page lists that can't possibly contain suitable pages. Reviewed by: kib, markj Glanced at: jhb Discussed with: jeff Sponsored by: EMC / Isilon Storage Division Differential Revision: https://reviews.freebsd.org/D4444
* [qca953x] remove unneeded initialisation.adrian2015-12-151-1/+1
| | | | | | | | | | This was copied from another chip file and it's not required on Honeybee. Tested: * AP143, QCA9531 SoC. Obtained from: OpenWRT
* [ar71xx] always count interrupts, spurious or otherwise.adrian2015-12-151-4/+2
| | | | This aids in debugging.
* [arge] add a comment about needing mdio busses in order to use the interface.adrian2015-12-151-0/+5
| | | | | | This is a holdover from how reset is handled in the ARGE_MDIO world. You need to define the mdio bus device if you want to use the ethernet device or the arge setup path doesn't bring the MAC out of reset.
* Correct the CONFIG0_VI value. According toimp2015-12-111-1/+1
| | | | | | | | | | | | http://www.t-es-t.hu/download/mips/md00090c.pdf this is bit 3 of the config0 word, not bit 2. This should fix virtually indexed caches (relatively new in the MIPS world, so no current platforms used this and current code just uses it as an optimization). It was causing false positives on newer platforms that default to large values for the kseg0 cache coherency attribute. Submitted by: Stanislav Galabov PR: 205249
* Add helper functions proc_readmem() and proc_writemem().markj2015-12-071-28/+8
| | | | | | | | | | | | | These helper functions can be used to read in or write a buffer from or to an arbitrary process' address space. Without them, this can only be done using proc_rwmem(), which requires the caller to fill out a uio. This is onerous and results in code duplication; the new functions provide a simpler interface which is sufficient for most existing callers of proc_rwmem(). This change also adds a manual page for proc_rwmem() and the new functions. Reviewed by: jhb, kib Differential Revision: https://reviews.freebsd.org/D4245
* Add support for the integrated wifi for the QCA953x base config andadrian2015-11-293-4/+6
| | | | | | | | AP143. Tested: * AP143 reference design board
* Remove sv_prepsyscall, sv_sigsize and sv_sigtbl members of the structkib2015-11-282-9/+0
| | | | | | | | | | | | | | | | sysent. sv_prepsyscall is unused. sv_sigsize and sv_sigtbl translate signal number from the FreeBSD namespace into the ABI domain. It is only utilized on i386 for iBCS2 binaries. The issue with this approach is that signals for iBCS2 were delivered with the FreeBSD signal frame layout, which does not follow iBCS2. The same note is true for any other potential user if sv_sigtbl. In other words, if ABI needs signal number translation, it really needs custom sv_sendsig method instead. Sponsored by: The FreeBSD Foundation
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