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* Network driver updatesjchandra2010-10-202-7/+7
| | | | | | | - Fix network driver issue on a XLS eval board (major# 8). - Fix issue uncovered by r213475 in check for XGMII Submitted by: Sriram Gorti (srgorti at netlogicmicro dot com)
* On uniprocessor, warn and fixup hardware cpu mask if more than on CPUjchandra2010-10-201-1/+9
| | | | is enabled by the bootloader.
* Converted the remainder of the NIC drivers to use the mii_attach()marius2010-10-152-8/+9
| | | | | | | introduced in r213878 instead of mii_phy_probe(). Unlike r213893 these are only straight forward conversions though. Reviewed by: yongari
* Convert the PHY drivers to honor the mii_flags passed down and convertmarius2010-10-152-10/+12
| | | | | | | | | | | | | | | | | | | | | | | the NIC drivers as well as the PHY drivers to take advantage of the mii_attach() introduced in r213878 to get rid of certain hacks. For the most part these were: - Artificially limiting miibus_{read,write}reg methods to certain PHY addresses; we now let mii_attach() only probe the PHY at the desired address(es) instead. - PHY drivers setting MIIF_* flags based on the NIC driver they hang off from, partly even based on grabbing and using the softc of the parent; we now pass these flags down from the NIC to the PHY drivers via mii_attach(). This got us rid of all such hacks except those of brgphy() in combination with bce(4) and bge(4), which is way beyond what can be expressed with simple flags. While at it, I took the opportunity to change the NIC drivers to pass up the error returned by mii_attach() (previously by mii_phy_probe()) and unify the error message used in this case where and as appropriate as mii_attach() actually can fail for a number of reasons, not just because of no PHY(s) being present at the expected address(es). Reviewed by: jhb, yongari
* Keep polling at 50hz as long as link state is changing.jmallett2010-10-131-3/+15
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* o) Make it possible to attach a PHY directly to an octe device rather thanjmallett2010-10-138-47/+815
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | using miibus, since for some devices that use multiple addresses on the bus, going through miibus may be unclear, and for devices that are not standard MII PHYs, miibus may throw a fit, necessitating complicated interfaces to fake the interface that it expects during probe/attach. o) Make the mv88e61xx SMI interface in octe attach a PHY directly and fix some mistakes in the code that resulted from trying too hard to present a nice interface to miibus. o) Add a PHY driver for the mv88e61xx. If attached (it is optional in kernel compiles so the default behavior of having a dumb switch is preserved) it will place the switch in a VLAN-tagging mode such that each physical port has a VLAN associated with it and interfaces for the VLANs can be created to address or bridge between them. XXX It would be nice for this to be part of a single module including the SMI interface, and for it to fit into a generic switch configuration framework and for it to use DSA rather than VLANs, but this is a start and gives some sense of the parameters of such frameworks that are not currently present in FreeBSD. In lieu of a switch configuration interface, per-port media status and VLAN settings are in a sysctl tree. XXX There may be some minor nits remaining in the handling of broadcast, multicast and unknown destination traffic. It would also be nice to go through and replace the few remaining magic numbers with macros at some point in the future. XXX This has only been tested with the MV88E6161, but it should work with minimal or no modification on related switches, so support for probing them was included. Thanks to Pat Saavedra of TELoIP and Rafal Jaworowski of Semihalf for their assistance in understanding the switch chipset.
* PCI fix for XLR C revision chips, limit DMA address to the first 2GBjchandra2010-10-062-2/+53
| | | | | | | physical address. Adds a dma tag to the XLR/XLS pci bus with the lowaddr if the CPU happens to be a XLR C rev. Submitted by: Sreekanth M. S. (kanthms at netlogicmicro dot com))
* XLR/XLS network driver (nlge) updates:jchandra2010-10-062-35/+167
| | | | | | | | | | - nlge_ioctl handles IFF_UP and IFF_PROMISC flags - Translate table code, to enable flow based CPU assignment added disabled by default (can be enabled by a tunable). - Changed signature of nlge_port_disable to make it consistent with nlge_port_enable - Removed TXCSUM and VLAN_HW_TAGGING from i/f capabilities. Submitted by: Sriram Gorti (srgorti at netlogicmicro dot com)
* Fix n64 compile.jchandra2010-10-061-1/+1
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* Network driver support for more XLR/XLS chip versions.jchandra2010-10-051-18/+129
| | | | Obtained from: Sriram Gorti (srgorti at netlogicmicro dot com)
* Clear any pending interrupts after disabling FMN interrupts. Add debuggingjchandra2010-10-052-20/+63
| | | | | | | | sysctl and counters for message ring threads (intial version). Update watermark values, and and decrease the maximum threads to 3 (this will leave a few CPUs for other processes) Minor comment fix in nlge.
* Fix asm for XKPHYS read for o32, constriants needed for input registersjchandra2010-10-051-13/+14
| | | | that are clobbered. Fixes a crash when compiled without DEBUG
* Update message ring handling code for XLR/XLSjchandra2010-10-037-280/+290
| | | | | | | | | | | - Wakeup multiple threads per core using message ring watermark interrupts. - Update message ring handler registration, use the real device station id for registering interrupts. - rge/nlge: update for the new message ring registration code. - rge/nlge: use 2 message ring stations for incoming packets, this will allow more messages to be queued. - nlge: comment fixes, remove unused variable - style and whitespace fixes
* o) Allow devices to override the MDIO read and write functions presented tojmallett2010-10-028-1/+231
| | | | | | | | the miibus attached to octe interfaces. o) Add an SMI/MDIO interface to the MV88E61XX and use it for the switch PHY on the Lanner MR-320. An actual driver for the switch PHY will come later. Note that for now it intercepts and fakes MII_BMSR reads to prevent the miibus from talking to anything but the switch itself.
* Rather than shifting offsets by three, set register offset to 3. All ourjmallett2010-10-023-16/+15
| | | | | | | | | bus interface does that's special here now is to use a 64-bit register size. In theory, uart(4) ought to support a regsz as well as regshft and support 64-bit registers directly. Also use the UART class's range rather than a hand-coded 1024 for the address range.
* Use ABI-aware macros for setting up a fake frame.jmallett2010-10-021-4/+4
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* Remove extra cpu setting and commented-out devices, some of which don't exist.jmallett2010-10-021-12/+0
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* Make the OCTEON1 configuration look like a normal GENERIC configuration. Injmallett2010-10-021-56/+250
| | | | | particular, add PCI and USB buses and most devices. Also move to using ULE, adding INET6, turning on WITNESS by default, etc.
* - Fix values of CS1_EN and CS2_EN flagsgonzo2010-09-292-7/+6
| | | | | | | - Unbreak kernel build by fixing naming convention of GPIO_FUNC flags Spotted by: Luiz Otavio O Souza, Andrew Thompson
* AR71XX_GPIO_* defines were introduced by adrian@ a while ago,gonzo2010-09-291-15/+0
| | | | remove duplicated.
* Add GPIO bus to config and hints. Also add sample gpioled device.gonzo2010-09-282-0/+15
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* Add AR71XX GPIO bus driver.gonzo2010-09-284-0/+530
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* Give devices lots of time to settle around programming BARs and commandjmallett2010-09-271-0/+4
| | | | | registers. Without this, the settings do not seem to stick for Atheros NICs in the PCI slot of the Lanner MR-320.
* o) Program the Lanner MR-320 for 32-bit mode, too.jmallett2010-09-271-14/+77
| | | | | | | | | | o) Give a virtual address for I/O ports on n64. o) On the Portwell CAM-0100, return the right IRQ for the on-board SATA. o) Except on bridges, only set PORTEN and MEMEN on devices that have I/O or memory BARs respectively. o) Disable PORTEN and MEMEN while reprogramming BARs. o) On the Lanner MR-955, set the Tx DMA power register for the on-board Promise SATA controller.
* XLS B0 revision PCI support and related changes.jchandra2010-09-273-61/+76
| | | | | | | | - XLS B0 and later revision chips have PCIe link 2 & 3 mapped to different PIC interrupts. Update pic.h, board.h and xlr_pci.c to reflect this. - remove debug prints in xlr_pci.c - add more processor IDs to board.h, add function xlr_is_xls_b0() - some style(9) and whitespace fixes
* o) Send mbufs to BPF listeners from within cvm_oct_xmit().jmallett2010-09-253-19/+11
| | | | | o) Pin receive threads when they're running since we do access some core-local resources.
* Handle link updates in a task.jmallett2010-09-255-58/+51
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* Make the vast majority of Simple Executive files standard. Perhaps some ofjmallett2010-09-241-18/+17
| | | | | | these could be made dependent on either of the octusb or octe options, but making them standard fixes a number of option combinations that were previously broken.
* o) Add bus_teardown_intr for pci and ciu. This allows the Promise SATAjmallett2010-09-242-1/+27
| | | | | | driver to try to switch interrupt handlers at setup. It's not a very good implementation of bus_teardown_intr, though. o) Set cache line size and latency timers for PCI devices per Linux.
* Flesh out PCI bus support some:jmallett2010-09-242-12/+412
| | | | | | | | | | | | | o) Reset and configure the bus from scratch rather than expecting U-Boot to do it for us. Values and configuration from Linux, U-Boot and comments in the Cavium Simple Executive sources. o) Do a resource assignment and bus numbering pass in the absence of a PCI BIOS or firmware that will do it for us. XXX This has to be the third or fourth instance of this in FreeBSD and it would be nice to have it become part of the PCI bus driver itself, like it is on Linux. o) Fix interrupt mapping for and adjust bus configuration for the Lanner MR-955, based on information provided by Lanner.
* Enforce that 'pmap_kenter()' is only used to establish cacheable mappings.neel2010-09-223-8/+6
| | | | | | | Mappings with other cacheability attributes can be established, if needed, by using 'pmap_kenter_attr()'. Suggested by: jchandra, imp
* n32 fixes for nlge.jchandra2010-09-212-4/+4
| | | | | Use correct define (__mips_n64) for n64 compilation and use correct parameter type for xlr_paddr_lw() in n32.
* Add 64 bit support to nlge, and additional fixesjchandra2010-09-202-64/+131
| | | | | | | | | | | | | - 64 bit fixes for ifnlge.c - Use m_nextpkt to save mbuf vaddr on 64 bit, we cannot store the 64 bit vaddr in the 40bit freeback field. - remove unused code and unnecessary variables. - use xlr_io_mmio macro instead of adding io base address - rewrite GPIO related code to fixup nlge using xlr_write_reg and DELAY - support for engg boards major num 11 and 12 - add xlr_paddr_lw() to load 32bit value from physical address, fix inline assembly - style fixes
* Fix to specify generic bus_add_child.jmallett2010-09-192-0/+4
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* Don't use memory that can't be direct-mapped on !n64.jmallett2010-09-191-0/+12
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* Fix octusb build.jmallett2010-09-181-1/+1
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* Fixes for XLR network accelerator driver (nlge).jchandra2010-09-174-59/+104
| | | | | | | | | | | | | - Process some tx done messages in the transmit path, to ensure that the XLR NA tx done FIFO does not overflow. - Add a message ring handler API to process atmost a given number of messages from a specified bucket mask. This will be used to process the tx done messages - Add a callout to restart transmit in the case transmit gets blocked. - Update enable_msgring_int() and disable_msgring_int(), remove unused args and make static. Obtained from: Sriram Gorti (srgorti at netlogicmicro dot com)
* Get rid of the unnecessary redirection of 'is_cacheable_mem()' toneel2010-09-172-4/+2
| | | | | | 'is_physical_memory()' through a macro. Implement 'is_cacheable_mem()' directly instead.
* Get rid of unused macros.neel2010-09-171-29/+0
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* Make a note of which platforms the mac strings come from.thompsa2010-09-171-0/+4
| | | | Suggested by: adrian
* Use getenv to find the mac address since it could be in the bootloaderthompsa2010-09-171-12/+14
| | | | environment or command line and under different names.
* RMI security accelerator driver update.jchandra2010-09-166-711/+117
| | | | | | | | | | - Compile fixes for 9.0, the previous version of this driver was for FreeBSD 6. - Add virtual address field in OperationDescriptor_t, we cannot use MIPS_PHYS_TO_KSEG0 on physical address. - Fixes for new message ring API - Remove unused sys/mips/rmi/dev/sec/stats.h - Whitespace fixes
* Update rge.h for r212758 - stats incremented using xlr_ldaddwu should bejchandra2010-09-161-6/+7
| | | | unsigned int.
* Network driver updates.jchandra2010-09-163-131/+124
| | | | | | | | | | | | | | - Move RMI MIPS extension to atomic increment word (LDADDWU) to common header file sys/mips/rmi/rmi_mips_exts.h - Fix xlr_ldaddwu() for 64 bit, it is a 32 bit operation, use unsigned int* instead of unsigned long* argument - Provide dummy xlr_enable_kx/xlr_restore_kx for n32 and n64. - Provide xlr_paddr_ld() instead of xlr_paddr_lw(), so that the descriptor formats are same for 32 and 64 bit - update nlge and rge for the changes These changes are also needed by the security driver which will be added later.
* Add 64-bit SWARM board kernel configs.neel2010-09-152-0/+43
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* Factor out the common parts of the swarm board in SWARM_COMMON and startneel2010-09-153-63/+73
| | | | including that in SWARM and SWARM_SMP kernel configs.
* Make the meaning of the 'mask' argument to 'set_intr_mask(mask)' consistentneel2010-09-155-5/+5
| | | | | | with the meaning of IM bits in the status register. Reviewed by: jmallett, jchandra
* Port r212559 to mips.neel2010-09-141-2/+0
| | | | | | | | | | | | | Do not explicitly enable interrupts in smp_init_secondary() because it renders any spinlock protected code after that point to run with interrupts enabled. This is because the processor is executing in the context of idlethread whose 'md_spinlock_count' is already set to 1. Instead just let sched_throw() re-enable interrupts when it releases the spinlock. The original powerpc commit log for r212559 is available here: http://svn.freebsd.org/viewvc/base?view=revision&revision=212559
* Enforce that pmap_mapdev() always returns uncacheable mappings.neel2010-09-141-9/+17
| | | | Reviewed by: imp, jchandra, jmallett
* TARGET_64BIT isn't needed anymore, GC it (partial merge from tbemd).imp2010-09-132-2/+0
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