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* SMP support for the mips port.neel2010-02-0917-222/+603
| | | | | | | The platform that supports SMP currently is a SWARM with a dual-core Sibyte processor. The kernel config file to use is SWARM_SMP. Reviewed by: imp, rrs
* Correct a comment - we are not setting the exception level but rather areneel2010-02-051-17/+10
| | | | | | | disabling interrupts. Simplify register usage - we can directly load 'curpcb' into 'k1' after interrupts are disabled. There is no need to do so indirectly through 'a1'.
* Initialize interrupt controller early on.neel2010-02-051-0/+18
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* Reimplement all functions to access the system control unit in C.neel2010-02-054-126/+145
| | | | | | | | | The only reason we need to have the sb_load64() and sb_store64() functions in assembly is to cheat the compiler and generate the 'ld' and 'sd' instructions which it otherwise will not do when compiling for a 32-bit architecture. There are some 64-bit registers in the SCD unit that must be accessed using 64-bit load and store instructions.
* style: don't need to use braces for single line control statements.neel2010-02-051-10/+5
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* Compile SWARM with KTRACE support.neel2010-02-041-0/+2
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* Get system call tracing using ktrace working for mips.neel2010-02-041-1/+2
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* Clean up all places in exception.S that fiddle with 'pcpup' directly. We nowneel2010-02-041-20/+0
| | | | | | | | use the GET_CPU_PCPU() macro exclusively. This isolates the users of pcpu data from its implementation details. Reviewed by: imp
* Reduce the size of the array used to store the TLB mappings for the kernelneel2010-02-031-1/+1
| | | | | | | | stack from 3 to 2. We only map in 2 pages for the kernel stack. Approved by: imp (mentor)
* Provide access to pcpu structures for SMP kernels.neel2010-01-306-118/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | The basic idea is to use a the same virtual address as a window onto distinct physical memory locations - one per processor. The physical address that you access through this mapping depends on which cpu you are currently executing on. We can now use the same virtual address on any processor to access its per-cpu area. The details are: - The virtual address for 'struct pcpu *pcpup' is obtained by stealing 2 pages worth of KVA in pmap_bootstrap(). - The mapping from the constant virtual address to a distinct physical page is done in cpu_pcpu_init() through a wired TLB entry. - A side-effect of this is that we reserve 2 pages worth of memory for the pcpu but in reality it needs much less than that. The unused memory is now used as the boot stack for the BSP and APs. Remove SMP-specific bits from locore.S. The plan is to use a separate mpboot.S for AP bootstrap. Discussed on: freebsd-mips Approved by: imp (mentor)
* Follow Neel's suggestion and switch to usingrrs2010-01-291-17/+18
| | | | | | restoreint() in combination with saving off the old level. That way we don't blast out the old level.
* For our memory re-mapping trick to workrrs2010-01-291-4/+20
| | | | | | | | | | | | interrupts must be disabled through the page_zero's or copys etc. Note that the temporary mapping used by panic's may cause us pain since int's may not be disabled. When we get dumps working we may have to revist this. Note that with this fix the build got much much further.. until it hung on disk IO (I would imagine thats the rge/msgring driver acting up).
* Its possible that our RMI box has memory extendingrrs2010-01-291-3/+16
| | | | | | | above 4Gig. If so when we add the base address with the size we will wrap. So for now we just ignore such memory and only use what we can. When we get 64 bit working then we will be much better ;->
* Move ID up into comment block.. per bsdimprrs2010-01-291-3/+4
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* - Increase timeouts to 100 milliseconds, 1 millisecond is definitely notgonzo2010-01-281-3/+3
| | | | | | enough for PCI controller to get into shape Thanks to: adrian@
* Add Cavium's standard copyright to those files that are currentlyimp2010-01-2816-6/+624
| | | | | | | lacking a copyright/license statement. All these files were in the Cavium FreeBSD source drop and appear to be written by Cavium (some are nearly verbatim copies of files from the cnusers' 1.9.0 SDK, which also uses this copyright).
* We make it to single user well, but not so well to multi-user. Forceimp2010-01-281-0/+2
| | | | | single user for the moment since that's a better experience for people trying this code out...
* trim unused members of the softc.imp2010-01-281-3/+0
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* Comment out any reference to ALCHEMY.hints until it's committed, to unbreakcognet2010-01-281-1/+1
| | | | | | make universe. Spotted out by: gahr
* Fix two of the extended memory hacks. The copy pagesrrs2010-01-281-2/+2
| | | | | | | | | | | | | | routine in one place was setting the valid2 bit to 2 not 1. This meant the PTE was NOT valid and so you would crash. In Zero Page there was a incorrect setting of the valid bit AFTER the actual zero (opps).. Hopefully this will fix the 0xc0000000 crashes that I have been seeing (unless of course there are other problems with these old hacks of mine to get to memory above 512Meg)
* Adds additional hacks for proper bits so thatrrs2010-01-281-0/+6
| | | | | | | | the RMI/XLR has the COP0 and COP2 bits enabled Plus it needs SX too. Thanks again for JC in catching this ;-) Submitted by: JC (jayachandranc@netlogicmicro.com
* Make compilable.. i.e. the FreeBSD id I added mustrrs2010-01-281-0/+2
| | | | be in comments.
* Changes the msg ring so its a filter not arrs2010-01-282-5/+8
| | | | | | | handler. Somehow rrs missed this.. Thanks to JC for catching this ;-) Obtained from: JC (jayachandranc@netlogicmicro.com
* Do not leave dirty cache lines behind if bus_dmamap_sync was calledkan2010-01-271-1/+25
| | | | | | | | | | | | to invalidate memory chunk that starts or ends in the middle of cache line. This was responsible for one half of the problem preventing umass to work reliably on some MIPS32 platforms. USBng needs to stop sharing cache lines between DMA-able memory and other structures to cure the other half. Discussed with: imp, gonzo
* Make a note that this file is the 64-bit version and experimental andimp2010-01-271-0/+7
| | | | point people at the OCTEON1-32 file instead.
* Move back to physical address 0x01000000. 0x00100000 seems to haveimp2010-01-271-2/+2
| | | | problems sometimes for reasons I haven't tracked down.
* Spacing changes in pic_ack and pic_delayed_ackrrs2010-01-261-4/+4
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* My current conf, that comes up butrrs2010-01-261-6/+5
| | | | | | | | locks up in make buildworld. You need to follow the mips wiki for building the nfs partition and setup things to mount there (in the conf and in your bootp setup).
* 1) Make sure static is init'd to 0rrs2010-01-261-1/+3
| | | | | 2) In one place make sure we call the backup startup routine (from the timer).
* To prevent a LOR we need to pass inrrs2010-01-262-21/+23
| | | | | | a lock flag in the pic routines. In some places we hold the pic lock, others we do not.
* Fix up the msg ring driver a bit tighterrrs2010-01-261-22/+7
| | | | | so that we don't loose an interrupt which we appeared to be doing.
* Fixes setup of clock. It was not properlyrrs2010-01-261-5/+15
| | | | | initialized, thus backward time warnings were being spewed to the console.
* Install the XTLB exception handler for Sibyte processors.neel2010-01-261-0/+24
| | | | | | | | | | | | This is a workaround for the fact that the CFE is compiled as a 64-bit application and therefore sets the SR_KX bit every time we call into it (for e.g. console). A TLB miss for any address above 0xc0000000 with the SR_KX bit set will end up at the XTLB exception vector. We workaround this by copying the standard TLB handler at the XTLB exception vector. Approved by: imp (mentor)
* Add a DDB command "show trapframe" to dump out contents of the trapframeneel2010-01-261-17/+37
| | | | | | specified by the first argument. Approved by: imp (mentor)
* Print the address of the base of the stackframe in DDB backtrace output.neel2010-01-261-1/+1
| | | | Approved by: imp (mentor)
* Doh. Remove extra pcpu initialization that I thought was needed, butimp2010-01-261-2/+0
| | | | isn't needed since we moved all that into mips_pcpu0_init.
* Fix a problem seen when a new process was returning to userlandneel2010-01-263-12/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | through fork_trampoline. This was caused because we were clearing the SR_INT_IE and setting SR_EXL bits of the status register at the same time. This meant that if an interrupt happened while this MTC0 was making its way through the pipeline the exception processing would see the status register with SR_EXL bit set. This in turn would mean that the COP_0_EXC_PC would not be updated so the return from exception would be to an incorrect address. It is easy to verify this fix by a program that forks in a loop and the child just exits: while (1) { pid_t pid = vfork(); if (pid == 0) _exit(0); if (pid != -1) waitpid(pid, NULL, 0); } Also remove two instances where we set SR_EXL bit gratuitously in exception.S. Approved by: imp (mentor)
* Export knowledge of the special bus space we use for the console toimp2010-01-252-5/+6
| | | | | | | | obio. Take advantage of the fact that obio only really supports uart at the moment to use the uart bus tag always for IOPORT allocations. # this needs to be redone to conform to FreeBSD standards and allow for # additional drivers for SoC hardware to attach
* Turn on debugging on the fpa unit. Fix some printfs that were onlyimp2010-01-251-5/+5
| | | | | enabled for debugging. This should be turned off before we release, but we need it for the moment.
* Store the mutex in the correct location. Before, we were storing itimp2010-01-251-4/+5
| | | | | | | | | | | | | | | | | | in the pcb at the td_lock offset, rather than in the struct thread at the td_lock offset. And we were storing a pointer to the old thread rather than to the mutex. Why this didn't always kill us, I'll never know. Fix an obsolete comment and update the prototype in the comments. Also note what variables are in what registers since this function is a little complex... neel@ found this problem and proposed this fix. This cures a number of different problem reports out there, and gets us booting octeon to the login prompt... Submitted by: neel@ Reviewed by: rrs@, gonzo@
* Fix device name for root....imp2010-01-251-4/+2
| | | | | Indent rgmii correctly. Remove stale comments.
* Comment out the led wheel code for the moment. Likely it shouldn'timp2010-01-251-3/+3
| | | | | even be here in the first place, but it is cool to see FreeBSD scrolling on the LED pannel of the octeon board when we're running...
* - Call post-boot fixup function in order to get proper staticgonzo2010-01-257-20/+33
| | | | | | | symbols resolving in DDB - When zeroing .bss/.sbss do not round end address to page boundary, it's not neccessary and might destroy data pased by trampoline or boot loader
* o Write the soft reset bit in the cavium core to reset. [1]imp2010-01-242-5/+5
| | | | | | o panic if the board boot descriptor is too old... Obtained from: [1] looking at the cavium sdk's executive code
* - Introduce kernel_kseg0_end variable that marks first address in KSEG0gonzo2010-01-242-0/+35
| | | | | | | | | | | available for use. All data below this address considered to be used by kernel. Along with kernel own data it might be symbol tables prepeared by trampoline code, boot loader service data passed for further analysis by kernel, etc... By default kernel_kseg0_end points to the end of loaded kernel. - Introduce mips_postboot_fixup function. It checks for symbol information copied by ELF trampoline and passes it to KDB
* - Copy symbol-related tables (.symtab and .strtab) to the end ofgonzo2010-01-242-1/+64
| | | | | relocated kernel. We use magic number to signal kernel that symbol data is present.
* Changes the order of the setting the int happened (insiderrs2010-01-241-1/+1
| | | | the lock).
* Eliminate octeonregs.h. It was a copy of maltaregs.h withimp2010-01-236-262/+11
| | | | s/malta/octeon/gi done...
* Remove Sibyte specific code from locore.S that sets the k0seg coherency.neel2010-01-233-8/+18
| | | | | | Move it to platform_start() instead. Approved by: imp (mentor)
* Migrate from old "DDB" style debugger to newer KDB style.imp2010-01-231-2/+4
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