summaryrefslogtreecommitdiffstats
path: root/sys/mips
Commit message (Expand)AuthorAgeFilesLines
* SMP support for the mips port.neel2010-02-0917-222/+603
* Correct a comment - we are not setting the exception level but rather areneel2010-02-051-17/+10
* Initialize interrupt controller early on.neel2010-02-051-0/+18
* Reimplement all functions to access the system control unit in C.neel2010-02-054-126/+145
* style: don't need to use braces for single line control statements.neel2010-02-051-10/+5
* Compile SWARM with KTRACE support.neel2010-02-041-0/+2
* Get system call tracing using ktrace working for mips.neel2010-02-041-1/+2
* Clean up all places in exception.S that fiddle with 'pcpup' directly. We nowneel2010-02-041-20/+0
* Reduce the size of the array used to store the TLB mappings for the kernelneel2010-02-031-1/+1
* Provide access to pcpu structures for SMP kernels.neel2010-01-306-118/+76
* Follow Neel's suggestion and switch to usingrrs2010-01-291-17/+18
* For our memory re-mapping trick to workrrs2010-01-291-4/+20
* Its possible that our RMI box has memory extendingrrs2010-01-291-3/+16
* Move ID up into comment block.. per bsdimprrs2010-01-291-3/+4
* - Increase timeouts to 100 milliseconds, 1 millisecond is definitely notgonzo2010-01-281-3/+3
* Add Cavium's standard copyright to those files that are currentlyimp2010-01-2816-6/+624
* We make it to single user well, but not so well to multi-user. Forceimp2010-01-281-0/+2
* trim unused members of the softc.imp2010-01-281-3/+0
* Comment out any reference to ALCHEMY.hints until it's committed, to unbreakcognet2010-01-281-1/+1
* Fix two of the extended memory hacks. The copy pagesrrs2010-01-281-2/+2
* Adds additional hacks for proper bits so thatrrs2010-01-281-0/+6
* Make compilable.. i.e. the FreeBSD id I added mustrrs2010-01-281-0/+2
* Changes the msg ring so its a filter not arrs2010-01-282-5/+8
* Do not leave dirty cache lines behind if bus_dmamap_sync was calledkan2010-01-271-1/+25
* Make a note that this file is the 64-bit version and experimental andimp2010-01-271-0/+7
* Move back to physical address 0x01000000. 0x00100000 seems to haveimp2010-01-271-2/+2
* Spacing changes in pic_ack and pic_delayed_ackrrs2010-01-261-4/+4
* My current conf, that comes up butrrs2010-01-261-6/+5
* 1) Make sure static is init'd to 0rrs2010-01-261-1/+3
* To prevent a LOR we need to pass inrrs2010-01-262-21/+23
* Fix up the msg ring driver a bit tighterrrs2010-01-261-22/+7
* Fixes setup of clock. It was not properlyrrs2010-01-261-5/+15
* Install the XTLB exception handler for Sibyte processors.neel2010-01-261-0/+24
* Add a DDB command "show trapframe" to dump out contents of the trapframeneel2010-01-261-17/+37
* Print the address of the base of the stackframe in DDB backtrace output.neel2010-01-261-1/+1
* Doh. Remove extra pcpu initialization that I thought was needed, butimp2010-01-261-2/+0
* Fix a problem seen when a new process was returning to userlandneel2010-01-263-12/+6
* Export knowledge of the special bus space we use for the console toimp2010-01-252-5/+6
* Turn on debugging on the fpa unit. Fix some printfs that were onlyimp2010-01-251-5/+5
* Store the mutex in the correct location. Before, we were storing itimp2010-01-251-4/+5
* Fix device name for root....imp2010-01-251-4/+2
* Comment out the led wheel code for the moment. Likely it shouldn'timp2010-01-251-3/+3
* - Call post-boot fixup function in order to get proper staticgonzo2010-01-257-20/+33
* o Write the soft reset bit in the cavium core to reset. [1]imp2010-01-242-5/+5
* - Introduce kernel_kseg0_end variable that marks first address in KSEG0gonzo2010-01-242-0/+35
* - Copy symbol-related tables (.symtab and .strtab) to the end ofgonzo2010-01-242-1/+64
* Changes the order of the setting the int happened (insiderrs2010-01-241-1/+1
* Eliminate octeonregs.h. It was a copy of maltaregs.h withimp2010-01-236-262/+11
* Remove Sibyte specific code from locore.S that sets the k0seg coherency.neel2010-01-233-8/+18
* Migrate from old "DDB" style debugger to newer KDB style.imp2010-01-231-2/+4
OpenPOWER on IntegriCloud