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* Add correct range parameter in XLP DTSjchandra2012-08-211-1/+1
| | | | | | | | r239274 added support for ranges. Update XLP DTS to provide the correct range parameter for the XLP SoC bus. Also fix bus_space_map method for XLP bus space. Submitted by: Sreekanth M. <sreekanth.molagavalli@broadcom.com>
* Define and exclude DRAM regions used by hardware/bootloder on XLPjchandra2012-08-201-65/+73
| | | | | Fix xlp_mem_init() - remove the ad-hoc code for excluding memory regions and use an array of regions.
* Support Netlogic XLP 8xx B1 revisions in xlpge.jchandra2012-07-092-20/+36
| | | | | Updates to the MDIO access code for the new revision of the XLP chip.
* Identify Netlogic XLP 8xx B1 chip revisionsjchandra2012-07-092-0/+25
| | | | | Add functions to check for 8xx B0 and 3xx Ax revisions which will be used in network block initialization.
* Fix PCIe hardware swap configuration for Netlogic XLPjchandra2012-07-091-2/+2
| | | | | | The last 12 bits of the limit registers have to be set to 1. These bits are not significant in bridge BARs and are 0 on read, but the bits are valid in the swap limit register and needs to be set.
* Remove unnecessary assembly code.jchandra2012-03-292-30/+26
| | | | | The compiler should generate lw/sw corresponding to register operations.
* Supply endianness implied by the -m flag when compiling ucore code.jmallett2012-03-291-1/+1
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* Fix little-endian built.jmallett2012-03-291-1/+1
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* Fix size of PCI softc.jchandra2012-03-271-1/+2
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* Resource allocation for XLP SoC SDHCI slotsjchandra2012-03-271-0/+16
| | | | | | | | The on-chip SD slots do not have PCI BARs corresponding to them, so this has to be handled in the custom SoC memory allocation. Provide memory resource for rids corresponding to BAR 0 and 1 in the custom allocation code.
* Update memory and resource allocation code for SoC devicesjchandra2012-03-279-375/+343
| | | | | | | | | | | | | | | | The XLP on-chip devices have PCI configuration headers, but some of the devices need custom resource allocation code. - devices with no MEM/IO BARs with registers in PCIe extended reg space have to be handled in memory resource allocation - devices without INTPIN/INTLINE in PCI header can be supported by having these faked with a shadow register. - Some devices does not allow 8/16 bit access to the register space, he default bus space cannot be used for these. Subclass pci and override attach and resource allocation methods to take care of this. Remove earlier code which did this partially.
* NOR flash driver for XLP.jchandra2012-03-273-0/+89
| | | | | The NOR interface on the SoC appears on the top level PCI bus. Add a simple driver for this.
* XLP UART code udpate.jchandra2012-03-274-27/+35
| | | | | | | Move XLP PCI UART device to sys/mips/nlm/dev/ directory. Other drivers for the XLP SoC devices will be added here as well. Update uart_cpu_xlp.c and uart_pci_xlp.c use macros for uart port, speed and IO frequency.
* xlpge : driver for XLP network acceleratorjchandra2012-03-2722-7/+6860
| | | | | | | | | | | | | Features: - network driver for the four 10G interfaces and two management ports on XLP 8xx. - Support 4xx and 3xx variants of the processor. - Source code and firmware building for the 16 mips32r2 micro-code engines in the Network Accelerator. - Basic initialization code for Packet ordering Engine. Submitted by: Prabhath Raman (prabhath at netlogicmicro com) [refactored and fixed up for style by jchandra]
* Support for EEPROM and CPLD on XLP EVP boards.jchandra2012-03-277-24/+487
| | | | | | | On XLP evaluation platform, the board information is stored in an I2C eeprom and the network block configuration is available from a CPLD connected to the GBU (NOR flash bus). Add support for both of these.
* Opencrypto driver for XLP Security and RSA/ECC blocksjchandra2012-03-279-0/+3508
| | | | | | | | Support for the Security and RSA blocks on XLP SoC. Even though the XLP supports many more algorithms, only the ones supported in OCF have been added. Submitted by: Venkatesh J. V. (venkatesh at netlogicmicro com)
* I2C support for XLP, add hints for I2C devices and update PCI resourcejchandra2012-03-271-0/+9
| | | | allocation code.
* XLP PCIe code update.jchandra2012-03-273-50/+99
| | | | | | | | | | | | - XLP supports hardware swap for PCIe IO/MEM accesses. Since we are in big-endian mode, enable hardware swap and use the normal bus space. - move some printfs to bootverbose, and remove others. - fix SoC device resource allocation code - Do not use '|' while updating PCIE_BRIDGE_MSI_ADDRL - some style fixes In collaboration with: Venkatesh J. V. (venkatesh at netlogicmicro com)
* Update the L1D cache flush sequence when enabling threads.jchandra2012-03-271-7/+7
| | | | Added more comments to the code.
* Switch to interrupt based message handling for XLP 8xx B0.jchandra2012-03-271-22/+22
| | | | Fixup some style issues in the file as well.
* Support for XLP4xx and XLP 8xx B0 revisionjchandra2012-03-274-54/+159
| | | | | | | - Add 4xx processor IDs, add workaround in CPU detection code. - Update frequency detection code for XLP 8xx. - Add setting device frequency code. - Update processor ID checking code.
* Fixes to the XLP startup code.jchandra2012-03-271-6/+12
| | | | | | Changes are: - Correct the order of calling init functions. - Fix up checking excluding reset area.
* o) Use ABI, not ISA_* options, to determine whether to compile bits if libkernjmallett2012-03-121-2/+0
| | | | | | | required for the ABI the kernel is being built for. XXX This is implemented in a kind-of nasty way that involves including source files, but it's still an improvement. o) Retire ISA_* options since they're unused and were always wrong.
* Remove platform APIs which are not used by any code and which had only stubjmallett2012-03-121-21/+0
| | | | | | | | | implementations or no implementation on all platforms. Some of these functions might be good ideas, but their semantics were unclear given the lack of implementation, and an unlucky porter could be fooled into trying to implement them or, worse, being baffled when something like platform_trap_enter() failed to be called.
* Fix N32 compilation again for XLP.jchandra2011-12-051-1/+1
| | | | | | | Disable DDB/KDB related options for N32, and add back a cast that was lost during the last set of updates. Reported by: gonzo, bz
* Fix XLP compilation.jchandra2011-12-051-0/+2
| | | | | | | Add definitions of LSU_DEBUG_ADDR and LSU_DEBUG_DATA0, the code that uses it was added in r227799 Reported by: gonzo
* - There's no need to overwrite the default device method with the defaultmarius2011-11-221-2/+1
| | | | | | | | | | one. Interestingly, these are actually the default for quite some time (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9) since r52045) but even recently added device drivers do this unnecessarily. Discussed with: jhb, marcel - While at it, use DEVMETHOD_END. Discussed with: jhb - Also while at it, use __FBSDID.
* Do dcache flush on CPU core before enabling threads.jchandra2011-11-211-3/+42
| | | | | | | | | The dcache flush has to be done using the core control registers before splitting the L1D cache by enabling the hardware threads. Also replace .word calls for mfcr/mtcr with a C macro. In collaboration with: prabhath at netlogicmicro com
* Merge XLP 3XX updates and related rework.jchandra2011-11-2113-1141/+891
| | | | | | | | | | | | | * Update message station (CMS) code, read queue ids from PCI header. * Use interrupts to wakeup message handling threads on 3XX * Update PIC code, read interrupt information from PCI header instead of using fixed values. * Update PCI interrupt handling for the PIC change. * Update code for getting chip frequency, new code support XLP 3XX * Misc style(9) fixes In collaboration with: prabhath at netlogicmicro com (CMS/PIC) venkatesh at netlogicmicro.com (PCI)
* Remove unused variable ubase.jchandra2011-11-191-2/+0
| | | | This vaiable is initialized but not used.
* Remvoe unused filejchandra2011-11-191-88/+0
| | | | mips/nlm/uart_cpu_xlp.c has replaced uart_bus_xlp_iodi.c
* Fix USB compilation, and add USB options to XLP confjchandra2011-11-191-1/+0
| | | | Remove obsolete header file included in usb_init.c
* Whitespace fixes in XLP HAL files.jchandra2011-11-199-358/+358
| | | | Also fixup a macro in iomap.h
* Rearrange XLP configuration files.jchandra2011-11-181-0/+3
| | | | | | | | | | | Create std.XLP for configuration options, which is included by the conf files. The files XLP, XLPN32 and XLP64 will have mostly ABI related options. Also move uart and pci to mips/nlm/std.xlp since all XLP configurations needs these devices. Obtained from: prabhath at netlogicmicro com (intial version)
* Fix XLP compile failure on n32 abi.jchandra2011-10-181-1/+1
| | | | Reported by: bz@
* Support for booting XLP using FDT.jchandra2011-10-183-98/+201
| | | | | | | | - update xlp_machdep.c to read arguments from FDT if FDT support is compiled in. - define rmi_uart_bus_space, and use it as fdtbus_bs_tag - update conf files for FDT support - add default dts file xlp-basic.dts
* - change "is is" to "is" or "it is"eadler2011-10-161-1/+1
| | | | | | | | - change "the the" to "the" Approved by: lstewart Approved by: sahil (mentor) MFC after: 3 days
* MIPS XLP platform code update.jchandra2011-09-0536-2505/+3941
| | | | | | | | | | | | | | * Update the hardware access register definitions and functions to bring them in line with other Netlogic software. * Update the platform bus to use PCI even for on-chip devices. Add a dummy PCI driver to ignore on-chip devices which do not need driver. * Provide memory and IRQ resource allocation code for on-chip devices which cannot get it from PCI config. * add support for on-chip PCI and USB interfaces. * update conf files, enable pci and retain old MAXCPU until we can support >32 cpus. Approved by: re(kib), jmallett
* MIPS changes for Netlogic XLP support.jchandra2011-07-163-17/+8
| | | | | | | | | | | | | | This patch adds support for the Netlogic XLP mips64 processors in the common MIPS code. The changes are : - Add CPU_NLM processor type - Add cases for CPU_NLM, mostly were CPU_RMI is used. - Update cache flush changes for CPU_NLM - Add kernel build configuration files for xLP. In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com> Approved by: bz(re), jmallett, imp(mips)
* Add MIPS platform files for Netlogic XLP SoC.jchandra2011-07-1630-0/+7112
Processor, UART, PIC and Messaging Network code. Also add sys/mips/nlm/hal for on-chip device registers. In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com> Approved by: bz(re), jmallett, imp(mips)
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