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* Switch to interrupt based message handling for XLP 8xx B0.jchandra2012-03-271-22/+22
| | | | Fixup some style issues in the file as well.
* Merge XLP 3XX updates and related rework.jchandra2011-11-211-175/+230
| | | | | | | | | | | | | * Update message station (CMS) code, read queue ids from PCI header. * Use interrupts to wakeup message handling threads on 3XX * Update PIC code, read interrupt information from PCI header instead of using fixed values. * Update PCI interrupt handling for the PIC change. * Update code for getting chip frequency, new code support XLP 3XX * Misc style(9) fixes In collaboration with: prabhath at netlogicmicro com (CMS/PIC) venkatesh at netlogicmicro.com (PCI)
* - change "is is" to "is" or "it is"eadler2011-10-161-1/+1
| | | | | | | | - change "the the" to "the" Approved by: lstewart Approved by: sahil (mentor) MFC after: 3 days
* MIPS XLP platform code update.jchandra2011-09-051-89/+83
| | | | | | | | | | | | | | * Update the hardware access register definitions and functions to bring them in line with other Netlogic software. * Update the platform bus to use PCI even for on-chip devices. Add a dummy PCI driver to ignore on-chip devices which do not need driver. * Provide memory and IRQ resource allocation code for on-chip devices which cannot get it from PCI config. * add support for on-chip PCI and USB interfaces. * update conf files, enable pci and retain old MAXCPU until we can support >32 cpus. Approved by: re(kib), jmallett
* MIPS changes for Netlogic XLP support.jchandra2011-07-161-4/+5
| | | | | | | | | | | | | | This patch adds support for the Netlogic XLP mips64 processors in the common MIPS code. The changes are : - Add CPU_NLM processor type - Add cases for CPU_NLM, mostly were CPU_RMI is used. - Update cache flush changes for CPU_NLM - Add kernel build configuration files for xLP. In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com> Approved by: bz(re), jmallett, imp(mips)
* Add MIPS platform files for Netlogic XLP SoC.jchandra2011-07-161-0/+451
Processor, UART, PIC and Messaging Network code. Also add sys/mips/nlm/hal for on-chip device registers. In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com> Approved by: bz(re), jmallett, imp(mips)
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