| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
| |
Similarly to other architecture, add the include for cpufunc.h which is
needed for pte.h by vmstat to resolve MIPS_CCA_UNCACHED.
|
| |
|
|
|
|
|
| |
Pad struct pcpu so that its size is denominator of PAGE_SIZE. This
is done to reduce memory waste in UMA_PCPU_ZONE zones.
Sponsored by: Nginx, Inc.
|
| |
|
|
|
|
|
| |
The platform that supports SMP currently is a SWARM with a dual-core Sibyte
processor. The kernel config file to use is SWARM_SMP.
Reviewed by: imp, rrs
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The basic idea is to use a the same virtual address as a window onto
distinct physical memory locations - one per processor. The physical
address that you access through this mapping depends on which cpu you
are currently executing on. We can now use the same virtual address
on any processor to access its per-cpu area.
The details are:
- The virtual address for 'struct pcpu *pcpup' is obtained by
stealing 2 pages worth of KVA in pmap_bootstrap().
- The mapping from the constant virtual address to a distinct
physical page is done in cpu_pcpu_init() through a wired TLB entry.
- A side-effect of this is that we reserve 2 pages worth of memory
for the pcpu but in reality it needs much less than that. The unused
memory is now used as the boot stack for the BSP and APs.
Remove SMP-specific bits from locore.S. The plan is to use a separate
mpboot.S for AP bootstrap.
Discussed on: freebsd-mips
Approved by: imp (mentor)
|
| |
|
|
|
|
|
| |
already define _KERNEL to get to this and I'm about to add hooks to
libkvm to access per-CPU data.
MFC after: 1 week
|
|
|
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
|
