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* - Populate dump_avail with proper values from phys_availgonzo2010-12-091-0/+3
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* Remove the 'machine mips' from DEFAULTS. Put the proper 'machine mipsimp2010-11-131-0/+9
| | | | | | mipsel' or 'machine mips mipseb' into the config file (with a few 64's tossed in for good measure). This will let us build the proper kernels with different worlds as part of make universe.
* Converted the remainder of the NIC drivers to use the mii_attach()marius2010-10-151-4/+5
| | | | | | | introduced in r213878 instead of mii_phy_probe(). Unlike r213893 these are only straight forward conversions though. Reviewed by: yongari
* - Fix values of CS1_EN and CS2_EN flagsgonzo2010-09-292-7/+6
| | | | | | | - Unbreak kernel build by fixing naming convention of GPIO_FUNC flags Spotted by: Luiz Otavio O Souza, Andrew Thompson
* AR71XX_GPIO_* defines were introduced by adrian@ a while ago,gonzo2010-09-291-15/+0
| | | | remove duplicated.
* Add AR71XX GPIO bus driver.gonzo2010-09-284-0/+530
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* Make a note of which platforms the mac strings come from.thompsa2010-09-171-0/+4
| | | | Suggested by: adrian
* Use getenv to find the mac address since it could be in the bootloaderthompsa2010-09-171-12/+14
| | | | environment or command line and under different names.
* bus_add_child: change type of order parameter to u_intavg2010-09-101-2/+2
| | | | | | | | | | This reflects actual type used to store and compare child device orders. Change is mostly done via a Coccinelle (soon to be devel/coccinelle) semantic patch. Verified by LINT+modules kernel builds. Followup to: r212213 MFC after: 10 days
* Migrate if_arge to use the PLL cpuops.adrian2010-08-192-30/+10
| | | | This has been lightly tested on the AR7161 and AR9132.
* Implement PLL generalisation in preparation for use in if_arge.adrian2010-08-193-3/+96
| | | | | | | | * Add a function to write to the relevant PLL register * Break out the PLL configuration for the AR71XX into the CPU ops, lifted from if_arge.c. * Add the AR91XX PLL configuration ops, using the AR91XX register definitions.
* add the PLL set functions to cpuopsadrian2010-08-191-0/+10
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* Fix mistaken indenting.adrian2010-08-191-5/+5
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* Add some initial AR724X chipset support.adrian2010-08-196-0/+228
| | | | | | | This is untested but should at least allow an AR724X to boot. The current code is lacking the detail needed to expose the PCIe bus. It is also lacking any NIC, PLL or flush/WB code.
* Add initial Atheros AR91XX support.adrian2010-08-195-0/+236
| | | | | | | | | | | | | | This works well enough to bring a system up to single-user mode using an MDROOT. Known Issues: * The EHCI USB doesn't currently work and will panic the kernel during attach. * The onboard ethernet won't work until the PLL routines have been fleshed out and shoe-horned into if_arge. * The WMAC device glue (and quite likely the if_ath support) hasn't yet been implemented.
* Add missing licence.adrian2010-08-191-0/+26
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* style(9) pick from imp@ .adrian2010-08-191-3/+2
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* Remove now unused 'reg'.adrian2010-08-191-1/+0
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* Initialise the USB system using cpuops rather than the AR71XX specific method.adrian2010-08-191-16/+1
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* Migrate the CPU reset path to use the new cpuops.adrian2010-08-191-3/+1
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* Remove the now-unused DDR flush register value.adrian2010-08-191-1/+0
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* Make the PCI initialisation path use the new cpuops rather than directlyadrian2010-08-191-8/+4
| | | | programming the reset register.
* Make if_arge use the new cpuops rather than hard coding the DDR flush registers.adrian2010-08-191-22/+8
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* Preparation work for supporting the AR91xx and AR724x.adrian2010-08-1910-32/+417
| | | | | | | | | | | | | | | * Implement a SoC probe function, from Linux, which determines the SoC family, type and revision. This only probes the AR71xx series SoC and (currently) panics on others. * Migrate some of the AR71XX specific hardware init (USB device, determining system frequencies) into using the cpuops introduced in an earlier commit. Other SoC specific hardware stuff (per-device flush/WB, GPIO pin wiring, Ethernet PLL setup, other things I've likely missed) will be introduced in subsequent commits. Reviewed by: imp@ Obtained from: (partially) Linux
* Add a DDR flush function, inspired by both Linux and if_arge.c.adrian2010-08-181-0/+10
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* Add a further register definition for USB device initialisation.adrian2010-08-181-0/+2
| | | | Obtained from: Linux
* Bring over the first cut of the Atheros-specific SoC operations.adrian2010-08-181-0/+108
| | | | | | | Each of these SoCs have different devices, different hardware initialisation methods and, quite likely, different quirks. These functions will abstract out the SoC differences and keep these differences out of the drivers (eg USB init, if_arge, etc.)
* Import initial AR91XX and AR724X CPU register definitions.adrian2010-08-182-0/+164
| | | | Obtained from: Linux
* - Add interrupts counter for PCI devicesgonzo2010-08-051-2/+12
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* Add TX-path aligned/unaligned stats for if_arge.adrian2010-07-082-1/+15
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* Address PR kern/148307 - fix if_ath TX mbuf alignment/size constraint checksadrian2010-07-081-1/+23
| | | | | | | | | | | | The existing code only checked the alignment of the first mbuf and didn't enforce the size constraints. This commit introduces a simple function to check the alignment and size of all mbufs in the list. This fixes the initial issue in the PR. PR: kern/148307 Reviewed by: gonzo@
* Introduce a sysctl block for if_arge and, for now, a blank debug sysctladrian2010-07-082-0/+19
| | | | | | placeholder for later. Add in a missing FreeBSD ID string.
* Fix the CS line definitions. These bits are for the CS2/CS1 linesadrian2010-07-071-4/+4
| | | | | | rather than CS1/CS0. This has been tested on the Ubiqiti Routerstation Pro board.
* Comment about the shared pins I know about.adrian2010-06-241-0/+2
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* AR71XX GPIO register definitions.adrian2010-06-231-0/+21
| | | | Reviewed by: gonzo@
* Extend the AR71XX watchdog debugging and data.adrian2010-06-191-1/+38
| | | | | | | | | * Add some per-device sysctl entries which record the watchdog state - whether it is armed; whether the last reboot was due to the watchdog. * Add a per-device sysctl debug flag to enable logging watchdog arming/ disarming. Reviewed by: gonzo@
* Add new tunable 'net.link.ifqmaxlen' to set default send interfacesobomax2010-05-031-2/+2
| | | | | | | | | | queue length. The default value for this parameter is 50, which is quite low for many of today's uses and the only way to modify this parameter right now is to edit if_var.h file. Also add read-only sysctl with the same name, so that it's possible to retrieve the current value. MFC after: 1 month
* - Fix mutex type for miibus_mtx: it's not spinlock, it's def lockgonzo2010-04-081-1/+1
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* Define DMA_RX_STATUS_OVERFLOW with correct value.kan2010-02-191-3/+3
| | | | | | | | The RX overflow is reported in bit 2 on real hardware and Linux driver for the same device already has this defined correctly. This fixes frequent interrupt storms seen on RouterStation Pro boards. Discussed with: gonzo
* - Increase timeouts to 100 milliseconds, 1 millisecond is definitely notgonzo2010-01-281-3/+3
| | | | | | enough for PCI controller to get into shape Thanks to: adrian@
* - Call post-boot fixup function in order to get proper staticgonzo2010-01-251-6/+11
| | | | | | | symbols resolving in DDB - When zeroing .bss/.sbss do not round end address to page boundary, it's not neccessary and might destroy data pased by trampoline or boot loader
* Update from old DDB convetion to initialize debugger to new KDB way.imp2010-01-231-1/+3
| | | | | Always call kdb_init(). If we have KDB enabled, then provide a handy place to break to the debugger.
* - Add driver for PCF2123, SPI real time clock/calendargonzo2010-01-223-0/+272
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* - Remove unnecessary register writes in activate_devicegonzo2010-01-212-18/+31
| | | | | | | | | | and deactivate_device - Save state before attaching driver and restore it when detaching - Clear CLK bit after last bit of byte has been sent over the bus providing falling edge for last byte in transfer - Fix several places where CS0 was always assumed - Add $FreeBSD$ to ar71xxreg.h
* Rename mips_pcpu_init to mips_pcpu0_init since it applies only to theimp2010-01-091-1/+1
| | | | BSP. Provide a missing prototype.
* Centralize initialization of pcpu, and set curthread early...imp2010-01-081-0/+3
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* - Add intr counters for APB interruptsgonzo2009-11-182-2/+12
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* - Handle multiphy MAC case: create interface withgonzo2009-11-122-83/+205
| | | | | | | | | | fixed-state media with parameters set via hints and configure MAC accordingly to these parameters. All the underlying PHY magic is done by boot manager on startup. At the moment there is no proper way to make active and control all PHYs simultaneously from one MII bus and there is no way to associate incoming/outgoing packet with specific PHY.
* - include register definitions for respective controllersgonzo2009-11-122-0/+2
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* - Access to all 5 PHYs goes through registers in MAC0 memorygonzo2009-11-083-9/+39
| | | | space, rewrite miibus accessors respectively
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