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* Remove the now-unused DDR flush register value.adrian2010-08-191-1/+0
* Make the PCI initialisation path use the new cpuops rather than directlyadrian2010-08-191-8/+4
* Make if_arge use the new cpuops rather than hard coding the DDR flush registers.adrian2010-08-191-22/+8
* Preparation work for supporting the AR91xx and AR724x.adrian2010-08-1910-32/+417
* Add a DDR flush function, inspired by both Linux and if_arge.c.adrian2010-08-181-0/+10
* Add a further register definition for USB device initialisation.adrian2010-08-181-0/+2
* Bring over the first cut of the Atheros-specific SoC operations.adrian2010-08-181-0/+108
* Import initial AR91XX and AR724X CPU register definitions.adrian2010-08-182-0/+164
* - Add interrupts counter for PCI devicesgonzo2010-08-051-2/+12
* Add TX-path aligned/unaligned stats for if_arge.adrian2010-07-082-1/+15
* Address PR kern/148307 - fix if_ath TX mbuf alignment/size constraint checksadrian2010-07-081-1/+23
* Introduce a sysctl block for if_arge and, for now, a blank debug sysctladrian2010-07-082-0/+19
* Fix the CS line definitions. These bits are for the CS2/CS1 linesadrian2010-07-071-4/+4
* Comment about the shared pins I know about.adrian2010-06-241-0/+2
* AR71XX GPIO register definitions.adrian2010-06-231-0/+21
* Extend the AR71XX watchdog debugging and data.adrian2010-06-191-1/+38
* Add new tunable 'net.link.ifqmaxlen' to set default send interfacesobomax2010-05-031-2/+2
* - Fix mutex type for miibus_mtx: it's not spinlock, it's def lockgonzo2010-04-081-1/+1
* Define DMA_RX_STATUS_OVERFLOW with correct value.kan2010-02-191-3/+3
* - Increase timeouts to 100 milliseconds, 1 millisecond is definitely notgonzo2010-01-281-3/+3
* - Call post-boot fixup function in order to get proper staticgonzo2010-01-251-6/+11
* Update from old DDB convetion to initialize debugger to new KDB way.imp2010-01-231-1/+3
* - Add driver for PCF2123, SPI real time clock/calendargonzo2010-01-223-0/+272
* - Remove unnecessary register writes in activate_devicegonzo2010-01-212-18/+31
* Rename mips_pcpu_init to mips_pcpu0_init since it applies only to theimp2010-01-091-1/+1
* Centralize initialization of pcpu, and set curthread early...imp2010-01-081-0/+3
* - Add intr counters for APB interruptsgonzo2009-11-182-2/+12
* - Handle multiphy MAC case: create interface withgonzo2009-11-122-83/+205
* - include register definitions for respective controllersgonzo2009-11-122-0/+2
* - Access to all 5 PHYs goes through registers in MAC0 memorygonzo2009-11-083-9/+39
* - Fix: Wrong register is used for initial value readinggonzo2009-11-061-1/+1
* - Fix initialization of PLL registers (different shifts forgonzo2009-11-062-8/+13
* - Replace dumb cut'n'paste call with not to self (XXX)gonzo2009-11-051-2/+4
* - style(9): replace whitespaces with tabsgonzo2009-11-041-23/+23
* - Remove noisy "Implement me" stubsgonzo2009-11-042-5/+21
* With this commit our friend RMI will now compile. I haverrs2009-10-302-0/+7
* - Fix build with DEVICE_POLLING enabledgonzo2009-10-301-5/+12
* Parse and save the command line passed in from RedBoot (exec -c "xxx") and alsothompsa2009-10-281-2/+44
* Does 4 things:rrs2009-10-151-0/+1
* - Fix CPU divisor maskgonzo2009-10-111-1/+1
* - Remove flags accidently brought by dumb cut'n'paste codinggonzo2009-09-031-6/+1
* - Fix phy address calculationgonzo2009-09-031-3/+3
* - Make USB part of AR71XX kernel buildable againgonzo2009-07-302-6/+17
* - Add AR71XX watchdog timer drivergonzo2009-07-092-0/+119
* - Move CPU/AHB frequency calculations to functions togonzo2009-07-094-38/+53
* - Fix PCI routing codegonzo2009-07-082-1/+8
* - Fix off-by-one bug in arge_fixup_rx. If mbuf is locatedgonzo2009-07-081-12/+12
* - Flush PCI register write before delaygonzo2009-06-191-2/+2
* - Take into account only unmasked bits in interrupt status registergonzo2009-06-161-2/+12
* - Fix functions prototypes to make compiler happygonzo2009-06-122-6/+8
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