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* Mips Atheros AR71XX: make PCI base slot configurable through hints.monthadar2013-01-061-2/+15
* Mechanically substitute flags from historic mbuf allocator withglebius2012-12-051-2/+2
* Make MIPS24k PMC optional on "hwpmc_mips24k."adrian2012-11-171-1/+1
* Migrate the AR71xx UART (an 8250 derivative) to hide behind uart_ar71xx.adrian2012-11-171-2/+2
* Ensure that BAR(0) is set for the PCI slot before the ath(4) PCI registersadrian2012-08-261-0/+4
* The GPIO drivers were initialising their mutexes with type ofrpaulo2012-08-171-2/+1
* Disable setting the MII port speed.adrian2012-05-041-0/+12
* Fix a totally bone-headed, last minute bounds check snafu that somehowadrian2012-05-031-3/+5
* Implement PLL configuration override support, similar to what openwrtadrian2012-05-022-3/+57
* Allow the MII mode to be overridden via 'hint.arge.X.miimode'.adrian2012-05-022-0/+25
* Add a missing newline.adrian2012-05-021-0/+1
* Further ar71xx MII support improvements.adrian2012-05-025-52/+61
* MII related infrastructure changes.adrian2012-05-025-0/+70
* Introduce an enum which encapsulates the PHY interface types that can beadrian2012-05-021-1/+7
* Add in the MII configuration parameters for the AR71xx.adrian2012-05-011-4/+15
* Break out the arge MDIO bus code into an optional argemdio device.adrian2012-05-013-115/+220
* Migrate ARGE_DEBUG to opt_arge.h.adrian2012-05-011-0/+2
* Allow for a default GPIO pin "high", which is required for some boardsadrian2012-04-201-1/+9
* Introduce the matching PCI ath(4) fixup code from ar71xx_pci intoadrian2012-04-205-83/+275
* Style(9) and white space fixes.adrian2012-04-171-31/+26
* Protect the PCI space registers behind a mutex.adrian2012-04-171-1/+22
* The AR913x MII speed configuration matches the AR71xx MII configuration.adrian2012-04-153-9/+4
* Fix the mask logic when reading PCI configuration space registers.adrian2012-04-151-2/+6
* (ab)Use the firmware API to store away EEPROM calibration data foradrian2012-04-131-6/+72
* Remove an unused variable. Grr.adrian2012-04-131-1/+1
* Sync this code against what's in OpenWRT trunk.adrian2012-04-131-27/+28
* Assume a big-endian default on MIPS and drop the "eb" suffix from MACHINE_ARCH.jmallett2012-03-291-1/+1
* Rework MIPS PMC code:gonzo2012-03-221-0/+2
* Move PMC hook invocation to cpu_intr. The idea is the same as with ast()gonzo2012-03-221-20/+3
* - Fix logic for detection if further processing of PMC should be performed.gonzo2012-03-181-6/+14
* style(9) changes.adrian2012-03-171-9/+10
* Begin fleshing out MII clock rate configuration changes.adrian2012-03-175-0/+74
* Remove a now unneeded ARGE_UNLOCK().adrian2012-03-131-3/+0
* Fix link status handling on if_arge upon system boot to allow bootp/NFS toadrian2012-03-131-7/+16
* Correctly (I hope) deallocate the if_arge RX buffer ring on arge_stop().adrian2012-03-131-0/+43
* o) Use ABI, not ISA_* options, to determine whether to compile bits if libkernjmallett2012-03-121-1/+0
* Remove platform APIs which are not used by any code and which had only stubjmallett2012-03-121-24/+0
* - Rename apb_intr to apb_filter since it's a filter handlergonzo2012-03-121-5/+38
* Break long lines.ray2012-03-061-25/+44
* Remove EoL whitespaces.ray2012-03-061-67/+66
* Stop overloading opt_global.h.adrian2012-01-162-0/+3
* Some of the atheros based embedded devices use one or more PCI NICsadrian2012-01-151-0/+81
* Fix the ar724x shift calculation when writing to the PCI config space.adrian2012-01-071-1/+1
* Remove these locks - they aren't strictly needed and cause measurableadrian2011-12-201-13/+0
* Re-jiggle the GPIO code a little to remove the hard-coded AR71xx GPIOadrian2011-12-151-25/+38
* Implement better support for USB controller suspend and resume.hselasky2011-12-142-51/+11
* Style(9) changes.adrian2011-12-133-126/+133
* Simplify arge_flush_ddr to use updated ar71xx_device_flush_ddr_ge(unit).ray2011-11-281-4/+2
* Fix build, fininshing r228018.glebius2011-11-281-2/+2
* Join chip depended methods for arge0 and arge1 into single call with unit.ray2011-11-275-118/+101
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