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* - Populate dump_avail with proper values from phys_availgonzo2010-12-091-0/+3
* Remove the 'machine mips' from DEFAULTS. Put the proper 'machine mipsimp2010-11-131-0/+9
* Converted the remainder of the NIC drivers to use the mii_attach()marius2010-10-151-4/+5
* - Fix values of CS1_EN and CS2_EN flagsgonzo2010-09-292-7/+6
* AR71XX_GPIO_* defines were introduced by adrian@ a while ago,gonzo2010-09-291-15/+0
* Add AR71XX GPIO bus driver.gonzo2010-09-284-0/+530
* Make a note of which platforms the mac strings come from.thompsa2010-09-171-0/+4
* Use getenv to find the mac address since it could be in the bootloaderthompsa2010-09-171-12/+14
* bus_add_child: change type of order parameter to u_intavg2010-09-101-2/+2
* Migrate if_arge to use the PLL cpuops.adrian2010-08-192-30/+10
* Implement PLL generalisation in preparation for use in if_arge.adrian2010-08-193-3/+96
* add the PLL set functions to cpuopsadrian2010-08-191-0/+10
* Fix mistaken indenting.adrian2010-08-191-5/+5
* Add some initial AR724X chipset support.adrian2010-08-196-0/+228
* Add initial Atheros AR91XX support.adrian2010-08-195-0/+236
* Add missing licence.adrian2010-08-191-0/+26
* style(9) pick from imp@ .adrian2010-08-191-3/+2
* Remove now unused 'reg'.adrian2010-08-191-1/+0
* Initialise the USB system using cpuops rather than the AR71XX specific method.adrian2010-08-191-16/+1
* Migrate the CPU reset path to use the new cpuops.adrian2010-08-191-3/+1
* Remove the now-unused DDR flush register value.adrian2010-08-191-1/+0
* Make the PCI initialisation path use the new cpuops rather than directlyadrian2010-08-191-8/+4
* Make if_arge use the new cpuops rather than hard coding the DDR flush registers.adrian2010-08-191-22/+8
* Preparation work for supporting the AR91xx and AR724x.adrian2010-08-1910-32/+417
* Add a DDR flush function, inspired by both Linux and if_arge.c.adrian2010-08-181-0/+10
* Add a further register definition for USB device initialisation.adrian2010-08-181-0/+2
* Bring over the first cut of the Atheros-specific SoC operations.adrian2010-08-181-0/+108
* Import initial AR91XX and AR724X CPU register definitions.adrian2010-08-182-0/+164
* - Add interrupts counter for PCI devicesgonzo2010-08-051-2/+12
* Add TX-path aligned/unaligned stats for if_arge.adrian2010-07-082-1/+15
* Address PR kern/148307 - fix if_ath TX mbuf alignment/size constraint checksadrian2010-07-081-1/+23
* Introduce a sysctl block for if_arge and, for now, a blank debug sysctladrian2010-07-082-0/+19
* Fix the CS line definitions. These bits are for the CS2/CS1 linesadrian2010-07-071-4/+4
* Comment about the shared pins I know about.adrian2010-06-241-0/+2
* AR71XX GPIO register definitions.adrian2010-06-231-0/+21
* Extend the AR71XX watchdog debugging and data.adrian2010-06-191-1/+38
* Add new tunable 'net.link.ifqmaxlen' to set default send interfacesobomax2010-05-031-2/+2
* - Fix mutex type for miibus_mtx: it's not spinlock, it's def lockgonzo2010-04-081-1/+1
* Define DMA_RX_STATUS_OVERFLOW with correct value.kan2010-02-191-3/+3
* - Increase timeouts to 100 milliseconds, 1 millisecond is definitely notgonzo2010-01-281-3/+3
* - Call post-boot fixup function in order to get proper staticgonzo2010-01-251-6/+11
* Update from old DDB convetion to initialize debugger to new KDB way.imp2010-01-231-1/+3
* - Add driver for PCF2123, SPI real time clock/calendargonzo2010-01-223-0/+272
* - Remove unnecessary register writes in activate_devicegonzo2010-01-212-18/+31
* Rename mips_pcpu_init to mips_pcpu0_init since it applies only to theimp2010-01-091-1/+1
* Centralize initialization of pcpu, and set curthread early...imp2010-01-081-0/+3
* - Add intr counters for APB interruptsgonzo2009-11-182-2/+12
* - Handle multiphy MAC case: create interface withgonzo2009-11-122-83/+205
* - include register definitions for respective controllersgonzo2009-11-122-0/+2
* - Access to all 5 PHYs goes through registers in MAC0 memorygonzo2009-11-083-9/+39
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