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path: root/sys/mips/atheros/if_arge.c
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* arge: don't do the rx fixup copy and just offset the mbuf by 2 bytesadrian2015-10-211-2/+29
* if_arge: fix up TX workaround; add TX/RX requirements for busdma; add statsadrian2015-10-181-21/+92
* Reshuffle all of the DDR flush operations into a single switch/mux,adrian2015-07-041-2/+16
* Begin moving support for board MAC addresses over to being explicitly defined.adrian2015-03-281-37/+51
* Use ar71xx_mac_addr_random_init() instead of a hand-rolled randomadrian2015-03-151-9/+2
* Modify the if_arge code to use a /fixed/ media mode when it's configured.adrian2015-03-081-6/+38
* Add initial QCA955x support to if_arge.c.adrian2015-03-021-1/+21
* Mechanically convert to if_inc_counter().glebius2014-09-191-2/+2
* Properly advertise that if_arge can handle long frames (if_arge is set toloos2014-07-031-0/+3
* Fix various NIC drivers to properly cleanup static DMA resources.jhb2014-06-111-8/+6
* Handle the case where both arge0 and arge1 MAC addresses are available viaadrian2014-03-161-1/+18
* Devices that rely on hints or identify routines for discovery need tonwhitehorn2013-10-291-1/+1
* - Provide necessary includes, that before came via if.h pollution.glebius2013-10-281-3/+4
* Whilst here, document that this TX alignment requirement may acutallyadrian2013-10-161-0/+8
* Allow the MDIO bus frequency to be selected.adrian2013-10-161-2/+129
* Add in the platform specific quirks to get the AR934x SoC ethernetadrian2013-10-161-7/+69
* Fix the leakage of dma tags on if_arge. The leak occur when arge_start()loos2013-09-061-0/+26
* Prevent the full restart cycle every time arge_start() is called. Onlyloos2013-08-291-1/+2
* Some vendors store the mac addresses of arge(4) as a literal sring in thesbruno2013-08-231-4/+17
* Implement the AR933x ethernet support.adrian2013-04-051-0/+4
* Mechanically substitute flags from historic mbuf allocator withglebius2012-12-051-2/+2
* Disable setting the MII port speed.adrian2012-05-041-0/+12
* Implement PLL configuration override support, similar to what openwrtadrian2012-05-021-3/+47
* Allow the MII mode to be overridden via 'hint.arge.X.miimode'.adrian2012-05-021-0/+24
* Further ar71xx MII support improvements.adrian2012-05-021-3/+14
* Break out the arge MDIO bus code into an optional argemdio device.adrian2012-05-011-101/+213
* Migrate ARGE_DEBUG to opt_arge.h.adrian2012-05-011-0/+2
* Remove a now unneeded ARGE_UNLOCK().adrian2012-03-131-3/+0
* Fix link status handling on if_arge upon system boot to allow bootp/NFS toadrian2012-03-131-7/+16
* Correctly (I hope) deallocate the if_arge RX buffer ring on arge_stop().adrian2012-03-131-0/+43
* Break long lines.ray2012-03-061-25/+44
* Remove EoL whitespaces.ray2012-03-061-67/+66
* Simplify arge_flush_ddr to use updated ar71xx_device_flush_ddr_ge(unit).ray2011-11-281-4/+2
* Fix build, fininshing r228018.glebius2011-11-281-2/+2
* Join chip depended methods for arge0 and arge1 into single call with unit.ray2011-11-271-4/+1
* - There's no need to overwrite the default device method with the defaultmarius2011-11-221-5/+1
* Close a race where SIOCGIFMEDIA ioctl get inconsistent link status.yongari2011-10-171-1/+1
* - Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOPmarius2011-05-031-4/+2
* if_arge has had a strange bug that only appears during high trafficadrian2011-04-051-0/+21
* * Add some more debugging to if_argeadrian2011-04-051-2/+31
* Put the ARGE_DEBUG behind a kernel config option.adrian2011-04-051-4/+10
* Begin fleshing out a functioning debugging setup for if_arge.adrian2011-04-051-13/+22
* A handful of the openwrt devices use a MAC address that's at a hard-codedadrian2011-04-021-0/+21
* Fix the TX underrun status reset; remove a now unused variable.adrian2011-03-131-2/+1
* Commit FIFO configuration fixes from OpenWRT. This fixes performanceadrian2011-03-131-4/+28
* Converted the remainder of the NIC drivers to use the mii_attach()marius2010-10-151-4/+5
* Migrate if_arge to use the PLL cpuops.adrian2010-08-191-28/+10
* style(9) pick from imp@ .adrian2010-08-191-3/+2
* Make if_arge use the new cpuops rather than hard coding the DDR flush registers.adrian2010-08-191-22/+8
* Add TX-path aligned/unaligned stats for if_arge.adrian2010-07-081-1/+11
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