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* Add kernel module support for nfslockd and krpc. Use the module systemdfr2008-03-271-0/+1
| | | | | | | to detect (or load) kernel NLM support in rpc.lockd. Remove the '-k' option to rpc.lockd and make kernel NLM the default. A user can still force the use of the old user NLM by building a kernel without NFSLOCKD and/or removing the nfslockd.ko module.
* When building a kernel module, define MAXCPU the same as SMP sojb2008-03-271-1/+1
| | | | that modules work with and without SMP.
* The "free-lance" timer in the i8254 is only used for the speakerphk2008-03-262-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | these days, so de-generalize the acquire_timer/release_timer api to just deal with speakers. The new (optional) MD functions are: timer_spkr_acquire() timer_spkr_release() and timer_spkr_setfreq() the last of which configures the timer to generate a tone of a given frequency, in Hz instead of 1/1193182th of seconds. Drop entirely timer2 on pc98, it is not used anywhere at all. Move sysbeep() to kern/tty_cons.c and use the timer_spkr*() if they exist, and do nothing otherwise. Remove prototypes and empty acquire-/release-timer() and sysbeep() functions from the non-beeping archs. This eliminate the need for the speaker driver to know about i8254frequency at all. In theory this makes the speaker driver MI, contingent on the timer_spkr_*() functions existing but the driver does not know this yet and still attaches to the ISA bus. Syscons is more tricky, in one function, sc_tone(), it knows the hz and things are just fine. In the other function, sc_bell() it seems to get the period from the KDMKTONE ioctl in terms if 1/1193182th second, so we hardcode the 1193182 and leave it at that. It's probably not important. Change a few other sysbeep() uses which obviously knew that the argument was in terms of i8254 frequency, and leave alone those that look like people thought sysbeep() took frequency in hertz. This eliminates the knowledge of i8254_freq from all but the actual clock.c code and the prof_machdep.c on amd64 and i386, where I think it would be smart to ask for help from the timecounters anyway [TBD].
* Simplify the interrupt code a bit:jhb2008-03-171-4/+1
| | | | | | | | | | | | - Always include the ie_disable and ie_eoi methods in 'struct intr_event' and collapse down to one intr_event_create() routine. The disable and eoi hooks simply aren't used currently in the !INTR_FILTER case. - Expand 'disab' to 'disable' in a few places. - Use function casts for arm and i386:intr_eoi_src() instead of wrapper routines since to trim one extra indirection. Compiled on: {arm,amd64,i386,ia64,ppc,sparc64} x {FILTER, !FILTER} Tested on: {amd64,i386} x {FILTER, !FILTER}
* Implement atomic_fetchadd_long() for all architectures and document it.pjd2008-03-161-0/+11
| | | | Reviewed by: attilio, jhb, jeff, kris (as a part of the uidinfo_waitfree.patch)
* In keeping with style(9)'s recommendations on macros, use a ';'rwatson2008-03-162-2/+2
| | | | | | | | | after each SYSINIT() macro invocation. This makes a number of lightweight C parsers much happier with the FreeBSD kernel source, including cflow's prcc and lxr. MFC after: 1 month Discussed with: imp, rink
* BUS_DMA_ISA is left over from Alpha, and is not used in the tree atimp2008-03-151-1/+1
| | | | | | | all. The reference in ia64 code is due to cutNpaste in its history and can safely be removed. Revired by: cognet, raj, marcel, jhb and maybe one other whom I'm forgetting
* Add preliminary support for binding interrupts to CPUs:jhb2008-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add a new intr_event method ie_assign_cpu() that is invoked when the MI code wishes to bind an interrupt source to an individual CPU. The MD code may reject the binding with an error. If an assign_cpu function is not provided, then the kernel assumes the platform does not support binding interrupts to CPUs and fails all requests to do so. - Bind ithreads to CPUs on their next execution loop once an interrupt event is bound to a CPU. Only shared ithreads are bound. We currently leave private ithreads for drivers using filters + ithreads in the INTR_FILTER case unbound. - A new intr_event_bind() routine is used to bind an interrupt event to a CPU. - Implement binding on amd64 and i386 by way of the existing pic_assign_cpu PIC method. - For x86, provide a 'intr_bind(IRQ, cpu)' wrapper routine that looks up an interrupt source and binds its interrupt event to the specified CPU. MI code can currently (ab)use this by doing: intr_bind(rman_get_start(irq_res), cpu); however, I plan to add a truly MI interface (probably a bus_bind_intr(9)) where the implementation in the x86 nexus(4) driver would end up calling intr_bind() internally. Requested by: kmacy, gallatin, jeff Tested on: {amd64, i386} x {regular, INTR_FILTER}
* Rework how the nexus(4) device works on x86 to better handle the idea ofjhb2008-03-131-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | different "platforms" on x86 machines. The existing code already handles having two platforms: ACPI and legacy. However, the existing approach was rather hardcoded and difficult to extend. These changes take the approach that each x86 hardware platform should provide its own nexus(4) driver (it can inherit most of its behavior from the default legacy nexus(4) driver) which is responsible for probing for the platform and performing appropriate platform-specific setup during attach (such as adding a platform-specific bus device). This does mean changing the x86 platform busses to no longer use an identify routine for probing, but to move that logic into their matching nexus(4) driver instead. - Make the default nexus(4) driver in nexus.c on i386 and amd64 handle the legacy platform. It's probe routine now returns BUS_PROBE_GENERIC so it can be overriden. - Expose a nexus_init_resources() routine which initializes the various resource managers so that subclassed nexus(4) drivers can invoke it from their attach routine. - The legacy nexus(4) driver explicitly adds a legacy0 device in its attach routine. - The ACPI driver no longer contains an new-bus identify method. Instead it exposes a public function (acpi_identify()) which is a probe routine that the MD nexus(4) drivers can use to probe for ACPI. All of the probe logic in acpi_probe() is now moved into acpi_identify() and acpi_probe() is just a stub. - On i386 and amd64, an ACPI-specific nexus(4) driver checks for ACPI via acpi_identify() and claims the nexus0 device if the probe succeeds. It then explicitly adds an acpi0 device in its attach routine. - The legacy(4) driver no longer knows anything about the acpi0 device. - On ia64 if acpi_identify() fails you basically end up with no devices. This matches the previous behavior where the old acpi_identify() would fail to add an acpi0 device again leaving you with no devices. Discussed with: imp Silence on: arch@
* - Fix build breakage; there was a reference to a removed syscall injeff2008-03-121-4/+3
| | | | a KASSERT(). Attempt to cleanup the comment to reflect reality.
* Remove kernel support for M:N threading.jeff2008-03-124-11/+0
| | | | | | | | While the KSE project was quite successful in bringing threading to FreeBSD, the M:N approach taken by the kse library was never developed to its full potential. Backwards compatibility will be provided via libmap.conf for dynamically linked binaries and static binaries will be broken.
* - Remove the old smp cpu topology specification with a new, more flexiblejeff2008-03-021-0/+7
| | | | | | | | | | | | | | | | | tree structure that encodes the level of cache sharing and other properties. - Provide several convenience functions for creating one and two level cpu trees as well as a default flat topology. The system now always has some topology. - On i386 and amd64 create a seperate level in the hierarchy for HTT and multi-core cpus. This will allow the scheduler to intelligently load balance non-uniform cores. Presently we don't detect what level of the cache hierarchy is shared at each level in the topology. - Add a mechanism for testing common topologies that have more information than the MD code is able to provide via the kern.smp.topology tunable. This should be considered a debugging tool only and not a stable api. Sponsored by: Nokia
* Re-sort options. While here:marcel2008-02-161-5/+8
| | | | | | o remove COMPAT_FREEBSD5 o add INVARIANTS o add WITNESS
* On Montecito processors, the instruction cache is in fact notmarcel2008-02-142-0/+19
| | | | | | | | coherent with the data caches. Implement a quick fix to allow us to boot on Montecito, while I'm working on a better fix in the mean time. Commit made on Montecito-based Itanium...
* Allocate a stack for thread0 and switch to it before callingmarcel2008-02-043-21/+34
| | | | | mi_startup(). This frees up kstack for static PAL/SAL calls and double-fault handling.
* Add a wrapper function that bound checks writes to the dump device.ru2008-01-281-6/+6
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* Add COMPAT_FREEBSD7 and enable it in configs that have COMPAT_FREEBSD6.jhb2008-01-071-0/+1
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* Add an access type parameter to pmap_enter(). It will be used to implementalc2008-01-031-2/+2
| | | | | | | superpage promotion. Correct a style error in kmem_malloc(): pmap_enter()'s last parameter is a Boolean.
* Use correct function name in panic messageimp2008-01-031-1/+1
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* Fix obsolete comment. pmap_remove_all is the function we're in.imp2008-01-031-2/+1
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* Add configuration knobs for the superpage reservation system. Initially,alc2007-12-271-0/+7
| | | | the reservation will only be enabled on amd64.
* Add a new 'why' argument to kdb_enter(), and a set of constants to userwatson2007-12-251-1/+2
| | | | | | | | | for that argument. This will allow DDB to detect the broad category of reason why the debugger has been entered, which it can use for the purposes of deciding which DDB script to run. Assign approximate why values to all current consumers of the kdb_enter() interface.
* Add stubs to unbreak LINT.jkoshy2007-12-071-0/+4
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* Add a BSD disklabel backend to g_part:marcel2007-12-061-1/+1
| | | | | | | o Disklabels can have between 8 and 20 partitions (inclusive). o No device special file is created for the raw partition. o Switch ia64 to use this backend. o No support for boot code yet.
* Break out stack(9) from ddb(4):rwatson2007-12-023-12/+58
| | | | | | | | | | | | | | | | | | | | - Introduce per-architecture stack_machdep.c to hold stack_save(9). - Introduce per-architecture machine/stack.h to capture any common definitions required between db_trace.c and stack_machdep.c. - Add new kernel option "options STACK"; we will build in stack(9) if it is defined, or also if "options DDB" is defined to provide compatibility with existing users of stack(9). Add new stack_save_td(9) function, which allows the capture of a stacktrace of another thread rather than the current thread, which the existing stack_save(9) was limited to. It requires that the thread be neither swapped out nor running, which is the responsibility of the consumer to enforce. Update stack(9) man page. Build tested: amd64, arm, i386, ia64, powerpc, sparc64, sun4v Runtime tested: amd64 (rwatson), arm (cognet), i386 (rwatson)
* Remove the 'needbounce' variable from the _bus_dmamap_load_buffer()jhb2007-11-271-5/+2
| | | | | | | | | routine. It is not needed as the existing tests for segment coalescing already handle bounced addresses and it prevents legal segment coalescing in certain edge cases. MFC after: 1 week Reviewed by: scottl
* Define atomic_readandclear_ptr.jasone2007-11-271-0/+1
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* Extend critical section coverage in the low-level interrupt handlers toscottl2007-11-211-1/+1
| | | | | | | | | | | | | | | | | | include the ithread scheduling step. Without this, a preemption might occur in between the interrupt getting masked and the ithread getting scheduled. Since the interrupt handler runs in the context of curthread, the scheudler might see it as having a such a low priority on a busy system that it doesn't get to run for a _long_ time, leaving the interrupt stranded in a disabled state. The only way that the preemption can happen is by a fast/filter handler triggering a schduling event earlier in the handler, so this problem can only happen for cases where an interrupt is being shared by both a fast/filter handler and an ithread handler. Unfortunately, it seems to be common for this sharing to happen with network and USB devices, for example. This fixes many of the mysterious TCP session timeouts and NIC watchdogs that were being reported. Many thanks to Sam Lefler for getting to the bottom of this problem. Reviewed by: jhb, jeff, silby
* Prevent the leakage of wired pages in the following circumstances:alc2007-11-171-0/+32
| | | | | | | | | | | | | | | | | | | | | | First, a file is mmap(2)ed and then mlock(2)ed. Later, it is truncated. Under "normal" circumstances, i.e., when the file is not mlock(2)ed, the pages beyond the EOF are unmapped and freed. However, when the file is mlock(2)ed, the pages beyond the EOF are unmapped but not freed because they have a non-zero wire count. This can be a mistake. Specifically, it is a mistake if the sole reason why the pages are wired is because of wired, managed mappings. Previously, unmapping the pages destroys these wired, managed mappings, but does not reduce the pages' wire count. Consequently, when the file is unmapped, the pages are not unwired because the wired mapping has been destroyed. Moreover, when the vm object is finally destroyed, the pages are leaked because they are still wired. The fix is to reduce the pages' wired count by the number of wired, managed mappings destroyed. To do this, I introduce a new pmap function pmap_page_wired_mappings() that returns the number of managed mappings to the given physical page that are wired, and I use this function in vm_object_page_remove(). Reviewed by: tegge MFC after: 6 weeks
* o Rename cpu_thread_setup() to cpu_thread_alloc() to bettermarcel2007-11-142-2/+9
| | | | | | | | | | | | | communicate that it relates to (is called by) thread_alloc() o Add cpu_thread_free() which is called from thread_free() to counter-act cpu_thread_alloc(). i386: Have cpu_thread_free() call cpu_thread_clean() to preserve behaviour. ia64: Have cpu_thread_free() call mtx_destroy() for the mutex initialized in cpu_thread_alloc(). PR: ia64/118024
* generally we are interested in what thread did something asjulian2007-11-141-3/+3
| | | | | | opposed to what process. Since threads by default have teh name of the process unless over-written with more useful information, just print the thread name instead.
* Fix for the panic("vm_thread_new: kstack allocation failed") andkib2007-11-052-2/+3
| | | | | | | | | | | | | | | | | | | | silent NULL pointer dereference in the i386 and sparc64 pmap_pinit() when the kmem_alloc_nofault() failed to allocate address space. Both functions now return error instead of panicing or dereferencing NULL. As consequence, vmspace_exec() and vmspace_unshare() returns the errno int. struct vmspace arg was added to vm_forkproc() to avoid dealing with failed allocation when most of the fork1() job is already done. The kernel stack for the thread is now set up in the thread_alloc(), that itself may return NULL. Also, allocation of the first process thread is performed in the fork1() to properly deal with stack allocation failure. proc_linkup() is separated into proc_linkup() called from fork1(), and proc_linkup0(), that is used to set up the kernel process (was known as swapper). In collaboration with: Peter Holm Reviewed by: jhb
* Set PTE_ACCESSED in the PTE and before inserting it in the VHPT.marcel2007-10-161-2/+12
| | | | | | | | This avoids back-to-back faults for all TLB misses. This can be improved further in the future by also setting PTE_DIRTY for TLB misses for write accesses. MFC after: 1 week
* The flushrs instruction must be the first in an instructionmarcel2007-10-161-0/+1
| | | | | | | group. GNU as(1) already made sure of that, but it's better to actually have the code right. MFC after: 1 week
* Print instruction stops to improve analysis of dependencymarcel2007-10-161-0/+2
| | | | | | violations. MFC after: 1 week
* Fix disassembly of the invala, itc, itr and hint instructionsmarcel2007-10-161-1/+1
| | | | | | by fixing the opcode ordering. MFC after: 1 week
* Use the correct expanded name for SCTP.brueffer2007-09-261-1/+1
| | | | | | | PR: 116496 Submitted by: koitsu Reviewed by: rrs Approved by: re (kensmith)
* Change the management of cached pages (PQ_CACHE) in two fundamentalalc2007-09-251-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ways: (1) Cached pages are no longer kept in the object's resident page splay tree and memq. Instead, they are kept in a separate per-object splay tree of cached pages. However, access to this new per-object splay tree is synchronized by the _free_ page queues lock, not to be confused with the heavily contended page queues lock. Consequently, a cached page can be reclaimed by vm_page_alloc(9) without acquiring the object's lock or the page queues lock. This solves a problem independently reported by tegge@ and Isilon. Specifically, they observed the page daemon consuming a great deal of CPU time because of pages bouncing back and forth between the cache queue (PQ_CACHE) and the inactive queue (PQ_INACTIVE). The source of this problem turned out to be a deadlock avoidance strategy employed when selecting a cached page to reclaim in vm_page_select_cache(). However, the root cause was really that reclaiming a cached page required the acquisition of an object lock while the page queues lock was already held. Thus, this change addresses the problem at its root, by eliminating the need to acquire the object's lock. Moreover, keeping cached pages in the object's primary splay tree and memq was, in effect, optimizing for the uncommon case. Cached pages are reclaimed far, far more often than they are reactivated. Instead, this change makes reclamation cheaper, especially in terms of synchronization overhead, and reactivation more expensive, because reactivated pages will have to be reentered into the object's primary splay tree and memq. (2) Cached pages are now stored alongside free pages in the physical memory allocator's buddy queues, increasing the likelihood that large allocations of contiguous physical memory (i.e., superpages) will succeed. Finally, as a result of this change long-standing restrictions on when and where a cached page can be reclaimed and returned by vm_page_alloc(9) are eliminated. Specifically, calls to vm_page_alloc(9) specifying VM_ALLOC_INTERRUPT can now reclaim and return a formerly cached page. Consequently, a call to malloc(9) specifying M_NOWAIT is less likely to fail. Discussed with: many over the course of the summer, including jeff@, Justin Husted @ Isilon, peter@, tegge@ Tested by: an earlier version by kris@ Approved by: re (kensmith)
* It has been observed on the mailing lists that the different categoriesalc2007-09-151-2/+4
| | | | | | | | | | | | | | | of pages don't sum to anywhere near the total number of pages on amd64. This is for the most part because uma_small_alloc() pages have never been counted as wired pages, like their kmem_malloc() brethren. They should be. This changes fixes that. It is no longer necessary for the page queues lock to be held to free pages allocated by uma_small_alloc(). I removed the acquisition and release of the page queues lock from uma_small_free() on amd64 and ia64 weeks ago. This patch updates the other architectures that have uma_small_alloc() and uma_small_free(). Approved by: re (kensmith)
* Clear pending interrupts before we enable external interrupts.marcel2007-08-061-5/+20
| | | | | | | | | | | | Recently the AP in my Merced box seems to have grown a habit of getting unexpected interrupts, such as redundant wake-ups and legacy interrupts that require an INTA cycle. While here, replace DELAY(0) with cpu_spinwait() so that it's clear what we're doing as well as enable the code to take advantage of cpu_spinwait() when it gets implemented. Approved by: re (blanket)
* Keep interrupts disabled while handling external interrupts.marcel2007-08-063-73/+64
| | | | | | | | | | | | There's no advantage in allowing nested external interrupts. In fact, it leads to a potential stack overrun. While here, put the interrupt vector in the trapframe, so as to compensate for the 36 cycle latency of reading cr.ivr. Further simplify assembly code by dealing with ASTs from C. Approved by: re (blanket)
* In ia64_set_rr(), don't perform data serialization. This allowsmarcel2007-08-051-1/+1
| | | | | | | | us to do the data serializations once after writing multiple region registers, as is done in pmap_switch(). All existing calls to ia64_set_rr() are followed with calls to ia64_srlz_d(). Approved by: re (blanket)
* Replace "__asm __volatile()" by equivalent support functions frommarcel2007-08-041-6/+6
| | | | | | | | | | | ia64_cpu.h. This improves readability and consistency and aids in auditing the code. Add instruction-serialization after writing to cr.pta. Delay enabling interrupts until after we setup the clocks and after we program the task priority register. Approved by: re (blanket)
* Replace "__asm __volatile()" by equivalent support functions frommarcel2007-08-041-3/+5
| | | | | | | | | ia64_cpu.h. This improves readability and consistency and aids in auditing the code. Add data-serialization after writing to the region registers and add instruction-serialization after writing to cr.pta. Approved by: re (blanket)
* Replace "__asm __volatile()" by equivalent support functions frommarcel2007-08-041-16/+18
| | | | | | | | ia64_cpu.h. This improves readability and consistency and aids in auditing the code. Add data-serialization after writing to cr.tpr. Approved by: re (blanket)
* Add required data-serialization after writing to cr.itm and cr.itv.marcel2007-08-041-0/+1
| | | | Approved by: re (blanket)
* Add ia64_srlz_d() and ia64_srlz_i() functions to aid in serialization.marcel2007-08-041-0/+12
| | | | Approved by: re (blanket)
* o Switch to physical addressing before dereferencing the VHPTmarcel2007-07-301-37/+62
| | | | | | | | | | | | bucket pointer. The virtual mapping may not be present in the translation cache. This will result in a nested TLB fault at a place we don't handle (and don't want to handle). o Make sure there's a stop after the rfi instruction, otherwise its behaviour is undefined. o Make sure we switch back to virtual addressing before doing a rfi. Behaviour is undefined otherwise. Approved by: re (blanket)
* Add option EXCEPTION_TRACING, which enables KTR-like functionalitymarcel2007-07-302-1/+85
| | | | | | | for processor interruptions. This is especially useful to track unexpected nested TLB faults. Approved by: re (blanket)
* Rework the interrupt code and add support for interrupt filteringmarcel2007-07-306-177/+239
| | | | | | | | | | | | | | | | | | | | (INTR_FILTER). This includes: o Save a pointer to the sapic structure and IRQ for every vector, so that we can quickly EOI, mask and unmask the interrupt. o Add locking to the sapic code now that we can reprogram a sapic on multiple CPUs at the same time. o Use u_int for the vector and IRQ. We only have 256 vectors, so using a 64-bit type for it is rather excessive. o Properly handle concurrent registration of a handler for the same vector. Since vectors have a corresponding priority, we should not map IRQs to vectors in a linear fashion, but rather pick a vector that has a priority in line with the interrupt type. This is left for later. The vector/IRQ interchange has been untangled as much as possible to make this easier. Approved by: re (blacket)
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