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* - Remove the eintrcnt/eintrnames usage and introduce the concept ofattilio2011-07-181-2/+5
* Enable NEW_PCIB by default on ia64.jhb2011-07-181-0/+2
* Implement bus_adjust_resource() for the ia64 nexus driver.jhb2011-07-181-17/+34
* Don't assume pmap_mapdev() gets called only for memory mapped I/Omarcel2011-07-161-3/+29
* Don't send EOI to the CPU before we handled the interrupt. This couldmarcel2011-07-162-4/+7
* Add a few more helper functions for working with memory descriptors:marcel2011-07-162-4/+54
* Implement basic support for memory attributes. At this time we onlymarcel2011-07-083-27/+121
* Disable PREEMPTION for now. See also PR ia64/147501.marcel2011-07-041-1/+1
* With retirement of cpumask_t and usage of cpuset_t for representing aattilio2011-07-041-9/+7
* When iterating over a paging queue, explicitly check for PG_MARKER, insteadalc2011-07-021-1/+1
* Change the management of nested faults by switching to physicalmarcel2011-06-302-133/+122
* Add a new option, OBJPR_NOTMAPPED, to vm_object_page_remove(). Passing thisalc2011-06-291-2/+2
* Oops. The sec field of struct bintime is *not* a 32-bit type.marcel2011-06-251-1/+1
* Define the minimum fractional period in terms of hz. We know hz ismarcel2011-06-251-2/+2
* Replace the original copyright notice with my own. Everything inmarcel2011-06-251-30/+22
* Update copyright.marcel2011-06-251-1/+1
* Switch to the event timers infrastructure. This includes:marcel2011-06-257-106/+136
* Unblock the outgoing thread after we performed pmap_switch() tomarcel2011-06-231-2/+2
* Use a non-standard page size that is supported.alc2011-06-211-1/+1
* Improve on style(9)marcel2011-06-171-94/+73
* Properly serialize the global shootdown with the instructionmarcel2011-06-172-2/+15
* Add the model number for the Montvale processor (marketed as Itanium 2 9100).marcel2011-06-111-0/+3
* MFCattilio2011-06-071-0/+2
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| * Call set_cputicker() to have the time counter use the ITC register.marcel2011-06-071-0/+2
* | MFCattilio2011-06-063-18/+47
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| * Improve cpu_idle():marcel2011-06-063-18/+47
| * On multi-core, multi-threaded PPC systems, it is important that the threadsnwhitehorn2011-05-313-6/+6
* | MFCattilio2011-05-313-6/+6
* | MFCattilio2011-05-144-23/+25
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| * Prefer switching the memory stack from user to kernel *before* switchingmarcel2011-05-141-3/+4
| * Sharpening the saw:marcel2011-05-141-8/+12
| * Be pedantic: mark the pcpu pointer (= register r13) itself as volatile.marcel2011-05-141-1/+1
| * Turn ia64_srlz() and ia64_srlz_i() into defines so that the code ismarcel2011-05-141-11/+8
| * Move the ZERO_REGION_SIZE to a machine-dependent file, as on manymdf2011-05-131-0/+2
* | MFCattilio2011-05-131-0/+2
* | Fix remaining bits that actually weren't converted by mistake.attilio2011-05-131-3/+4
* | MFCattilio2011-05-071-0/+22
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| * In pmap_kextract(), return the physical address for PBVM virtualmarcel2011-05-071-0/+22
| * Retire isa_setup_intr() and isa_teardown_intr() and use the generic busjhb2011-05-061-22/+0
* | MFCattilio2011-05-061-22/+0
* | Commit the support for removing cpumask_t and replacing it directly withattilio2011-05-053-9/+10
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* Don't use the whole region 5 for KVA, because the CPU may not implement allmarcel2011-05-021-1/+2
* Stop linking against a direct-mapped virtual address and insteadmarcel2011-04-3012-304/+520
* Change rman_manage_region() to actually honor the rm_start and rm_endjhb2011-04-291-1/+1
* Add the watchdogs patting during the (shutdown time) disk syncing andattilio2011-04-281-0/+8
* This patch changes head so that the default NFS client is now the newrmacklem2011-04-271-2/+2
* Remove prototypes of non-existent functions.marcel2011-04-251-5/+0
* Switch the GENERIC kernels for all architectures to the new CAM-based ATAmav2011-04-241-10/+9
* Use the new arch_loadaddr I/F to align ELF objects to PBVM pagemarcel2011-04-031-1/+5
* Add support for executing the FreeBSD 1/i386 a.out binaries on amd64.kib2011-04-012-0/+20
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