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* Rework the interrupt code and add support for interrupt filteringmarcel2007-07-301-8/+13
| | | | | | | | | | | | | | | | | | | | (INTR_FILTER). This includes: o Save a pointer to the sapic structure and IRQ for every vector, so that we can quickly EOI, mask and unmask the interrupt. o Add locking to the sapic code now that we can reprogram a sapic on multiple CPUs at the same time. o Use u_int for the vector and IRQ. We only have 256 vectors, so using a 64-bit type for it is rather excessive. o Properly handle concurrent registration of a handler for the same vector. Since vectors have a corresponding priority, we should not map IRQs to vectors in a linear fashion, but rather pick a vector that has a priority in line with the interrupt type. This is left for later. The vector/IRQ interchange has been untangled as much as possible to make this easier. Approved by: re (blacket)
* Rewrite the SAPIC initialization to always program the RTEs with whatmarcel2003-09-101-5/+5
| | | | | | | | we think is the correct trigger mode and polarity. This allows us to implement BUS_CONFIG_INTR() as an update of the RTE in question. Consequently, we can trust the RTE when we enable an interrupt and avoids that we need to know about the trigger mode and polarity at that time.
* List the IO SAPIC delivery mode definitions.peter2002-10-041-0/+7
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* Add debug code to print SAPIC registers.dfr2002-03-141-0/+3
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* Wire up most of the interrupt handling infrastructure. Not sure it worksdfr2001-10-051-0/+50
right yet but its enough for the ATA probe to work. The SCSI probes which follow are broken though.
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