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path: root/sys/ia64/ia64/machdep.c
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* Ignore memory above 4GB for now due to unpleasant pci issues.peter2002-08-031-0/+15
* Remove the definition of struct mca_guid and use the genericmarcel2002-05-291-0/+1
* Flesh-out ptrace support. This obviously needs more work.marcel2002-05-201-14/+95
* o Remove namespace pollution from param.h:marcel2002-05-191-0/+1
* PCPU(current_pmap) is initialized in pmap_bootstrap. No need tomarcel2002-05-021-1/+0
* Connect up kern_envp *before* we use it for getenv() and console probing.peter2002-05-011-7/+14
* Make this work for ski again. Don't call ia64_mca_init() when we'remarcel2002-04-301-11/+10
* Initialize MCA in cpu_startup() so that it's ready before we wake-upmarcel2002-04-261-0/+3
* The official name for McKinley is: Itanium 2marcel2002-04-251-1/+1
* Remove the bootinfo kludge. We get the address of the bootinfomarcel2002-04-191-28/+3
* Rework the kernel environment subsystem. We now convert the staticmux2002-04-171-1/+4
* Allow a kernel to be compiled with both SKI and acpica and stillpeter2002-04-141-2/+14
* Add comment that sigreturn() is MPSAFE.alc2002-04-131-0/+2
* Initialise ar.cflg, which contains the IA-32 registers cr0 and cr4. Sincedfr2002-04-121-0/+7
* Really fix uniprocessor on IA64. Note to self: do not use variables beforepeter2002-04-121-1/+1
* GC various bits and pieces of USERCONFIG from all over the place.phk2002-04-091-12/+0
* Moved signal handling and rescheduling from userret() to ast() so thatbde2002-04-041-0/+1
* o Kill the MD grow_stack(). Call the MI vm_map_growstack()alc2002-04-041-18/+16
* o GC dumplomarcel2002-04-031-4/+2
* - Move the MI mutexes sched_lock and Giant from being declared in thejhb2002-04-021-18/+5
* o GC totalphysmem and resvmem.marcel2002-04-021-11/+5
* Transition to a model where the loader passes the address of themarcel2002-03-301-3/+30
* Add a new mtx_init option "MTX_DUPOK" which allows duplicate acquires of locksjeff2002-03-271-1/+1
* In UP mode, the primary cpu's per-cpu current_pmap was not initialized -peter2002-03-211-0/+1
* Remove __P.alfred2002-03-201-2/+2
* My ia64 box for some reason likes to fragment the beginning/end of memorypeter2002-03-191-1/+1
* Move a couple of prototypes together instead of being incompletelypeter2002-03-191-3/+0
* Move the call to pmap_bootstrap to after the initialisation of thread0.dfr2002-03-141-6/+9
* Fix a warning (make ucontext_t *ucp a const)peter2002-03-121-1/+2
* Stop concatenating __func__ with stringspeter2002-03-121-2/+2
* * Include <sys/ucontext.h> so that this compiles again.dfr2002-03-031-12/+15
* Pre-KSE/M3 commit.julian2002-02-071-10/+9
* Compile osigreturn() unconditionally since it will always be needed onbde2002-02-011-15/+6
* Remove the definition of bootverbose. This fixes the link failuremarcel2002-01-181-1/+1
* o Reimplement map_pal_code to work with a global variablemarcel2001-12-301-51/+37
* Overhaul the per-CPU support a bit:jhb2001-12-111-15/+8
* Allow maxusers to be specified as 0 in the kernel config, which willdillon2001-12-091-1/+2
* Initial cut at calling the EFI-provided FPSWA (Floating Point Softwarepeter2001-11-191-0/+11
* o os_boot_rendez is responsible for clearing the IRR bit bymarcel2001-11-121-4/+9
* Remove #if 0'ed code that was replaced by vm_ksubmap_init() and GC'edpeter2001-11-121-126/+0
* Reserve more space for phys_avail. Really need to be more careful aboutdfr2001-11-091-1/+1
* argh! cut/paste typo. :-(peter2001-11-021-1/+1
* "Fix" a problem that got copied from alpha to ia64 and broke there.peter2001-11-021-1/+3
* * Factor out common code for manipulating the RSE backing store.dfr2001-10-291-1/+58
* Fix RAW dependency violation when compiled with gcc-3peter2001-10-231-1/+1
* Turn off the single-user override. We've been running multi-userpeter2001-10-231-5/+0
* {set,fill}_{,fp,db}regs() fixup:des2001-10-211-1/+14
* Use ia64_set_fpsr() instead of __asm to set ar.fpsr.dfr2001-10-211-1/+1
* Shift the code which packs and unpacks instruction bundles out of DDBdfr2001-10-181-0/+26
* When compiling with SKI support, create the fake memory regionsmarcel2001-10-151-1/+1
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