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* Handling all the three clocks (hardclock, softclock, profclock) with theattilio2010-01-153-37/+65
| | | | | | | | | | | | | | | | | | LAPIC may lead to aliasing for softclock and profclock because frequencies are sized in order to fit mainly hardclock. atrtc used to take care of the softclock and profclock and it does still do, if the LAPIC can't handle the clocks properly. Revert the change when the LAPIC started taking charge of all three of them and let atrtc handle softclock and profclock if not explicitly requested. Such request can be made setting != 0 the new tunable machdep.lapic_allclocks or if the new device ATPIC is not present within the i386 kernel config (atrtc is linked to atpic presence). Diagnosed by: Sandvine Incorporated Reviewed by: jhb, emaste Sponsored by: Sandvine Incorporated MFC: 3 weeks
* Only allocate the space we need before calling kern_getgroups insteadbrooks2010-01-151-3/+7
| | | | | | | | | | | | of allocating what ever the user asks for up to "ngroups_max + 1". On systems with large values of kern.ngroups this will be more efficient. The now redundant check that the array is large enough in kern_getgroups() is deliberate to allow this change to be merged to stable/8 without breaking potential third party consumers of the API. Reported by: bde MFC after: 28 days
* Spell "Hz" correctly wherever it is user-visible.gavin2010-01-121-1/+1
| | | | | | | PR: bin/142566 Submitted by: N.J. Mann njm njm.me.uk Approved by: ed (mentor) MFC after: 2 weeks
* Replace the static NGROUPS=NGROUPS_MAX+1=1024 with a dynamicbrooks2010-01-121-2/+2
| | | | | | | | kern.ngroups+1. kern.ngroups can range from NGROUPS_MAX=1023 to INT_MAX-1. Given that the Windows group limit is 1024, this range should be sufficient for most applications. MFC after: 1 month
* Use io(4) for I/O port access on ia64, rather than through sysarch(2).marcel2010-01-112-0/+10
| | | | | | | | | | | | | | | | | I/O port access is implemented on Itanium by reading and writing to a special region in memory. To hide details and avoid misaligned memory accesses, a process did I/O port reads and writes by making a MD system call. There's one fatal problem with this approach: unprivileged access was not being prevented. /dev/io serves that purpose on amd64/i386, so employ it on ia64 as well. Use an ioctl for doing the actual I/O and remove the sysarch(2) interface. Backward compatibility is not being considered. The sysarch(2) approach was added to support X11, but support for FreeBSD/ia64 was never fully implemented in X11. Thus, nothing gets broken that didn't need more work to begin with. MFC after: 1 week
* Simplify pmap_init(). Additionally, correct a harmless misbehavior on i386.alc2010-01-112-5/+4
| | | | | | | | | Specifically, where locore had created large page mappings for the kernel, the wrong vm page array entries were being initialized. The vm page array entries for the pages containing the kernel were being initialized instead of the vm page array entries for page table pages. MFC after: 1 week
* Eliminate an unused declaration.alc2010-01-111-3/+0
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* Eliminate unused declarations.alc2010-01-101-3/+0
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* Add INCLUDE_CONFIG_FILE in GENERIC on all non-embedded platforms.imp2010-01-101-0/+1
| | | | | | # This is the resolution of removing it from DEFAULTS... MFC after: 5 days
* Long ago, in r120654, the rounding of KERNend and physfree in locorealc2010-01-091-20/+0
| | | | | | was changed from a small page boundary to a large page boundary. As a consequence pmap_kmem_choose() became a pointless waste of address space. Eliminate it.
* In sys/<arch>/conf/Makefile set TARGET to <arch>. That allowsbz2010-01-081-0/+2
| | | | | | | | | | | | | | | | sys/conf/makeLINT.mk to only do certain things for certain architectures. Note that neither arm nor mips have the Makefile there, thus essentially not (yet) supporting LINT. This would enable them do add special treatment to sys/conf/makeLINT.mk as well chosing one of the many configurations as LINT. This is a hack of doing this and keeping it in a separate commit will allow us to more easily identify and back it out. Discussed on/with: arch, jhb (as part of the LINT-VIMAGE thread) MFC after: 1 month
* Unbreak the XEN build after r201751.bz2010-01-081-0/+4
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* Catch up with r183101 that added "device acpi" to GENERIC.alc2010-01-081-4/+0
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* Make pmap_set_pg() static.alc2010-01-073-3/+4
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* Eliminate unused variables (see r137912).alc2010-01-072-4/+0
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* Revert 200594. This file isn't intended for these sorts of things.imp2010-01-041-7/+0
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* Add vlan(4) to all GENERIC kernels.brooks2010-01-031-0/+1
| | | | MFC after: 1 week
* Quiet variable "shadows" warning:obrien2010-01-011-18/+18
| | | | | | | sys/vmmeter.h: warning: shadowed declaration is here machine/cpufunc.h: In function 'insw': machine/cpufunc.h: warning: declaration of 'cnt' shadows a global declaration ..snip..
* Update d_mmap() to accept vm_ooffset_t and vm_memattr_t.rnoland2009-12-293-5/+6
| | | | | | | | | | | | | This replaces d_mmap() with the d_mmap2() implementation and also changes the type of offset to vm_ooffset_t. Purge d_mmap2(). All driver modules will need to be rebuilt since D_VERSION is also bumped. Reviewed by: jhb@ MFC after: Not in this lifetime...
* - Create a separate section in in the MI NOTES file for PCI wireless NICjhb2009-12-181-19/+0
| | | | | | | drivers and move bwi(4) there from the PCI Ethernet NIC section. - Move ath(4) and ral(4) to the MI NOTES file. Reviewed by: rpaulo
* Add INCLUDE_CONFIG_FILE, and a note in comments about how to alsodougb2009-12-161-0/+7
| | | | include the comments with CONFIGARGS
* Remove comment claiming that building acpi into the kernel is deprecated.jhb2009-12-141-3/+0
| | | | | | PR: docs/141353 Submitted by: Bruce Cran MFC after: 1 week
* for PV XEN translate page table entries from machine (real) to physical ↵kmacy2009-12-101-0/+16
| | | | | | (logical) addresses so that kgdb can translate them to the correct coredump offsets
* - revert pmap_kenter_temporary to taking a physical addresskmacy2009-12-103-9/+11
| | | | - make minidump work
* make PV core dump actually dump memory - still need to fix program header ↵kmacy2009-12-092-0/+7
| | | | initialization
* mca: small enhancements related to cpu quirksavg2009-12-031-8/+22
| | | | | | | | | | | | - use utility macros for CPU family/model checking - limit Intel P6 quirk to pre-Nehalem models (taken from OpenSolaris) - add AMD GartTblWkEn quirk for families 0Fh and 10h; I haven't experienced any problems without the quirk but both Linux and OpenSolaris do this - slightly re-arrange quirk code to provide for the future generalization and separation of vendor-specific quirk functions Reviewed by: jhb MFC after: 1 week
* Fix cut'n paste on the AR9280 entry.thompsa2009-12-021-1/+1
| | | | Submitted by: pluknet
* mca: improve status checking, recording and reportingavg2009-12-022-49/+63
| | | | | | | | | | - directly print mca information in case we fail to allocate memory for a record - include bank number into mca record - print raw mca status value for extended information Reviewed by: jhb MFC after: 10 days
* Add missing ath_ar9* ath hal entries.thompsa2009-12-021-0/+2
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* amdsbwd: new driver for AMD SB600/SB7xx watchdog timeravg2009-11-301-0/+2
| | | | | | | | | | | | The hardware is compliant with WDRT specification, so I originally considered including generic WDRT watchdog support, but decided against it, because I couldn't find anyone to the code for me. WDRT seems to be not very popular. Besides, generic WDRT porbably requires a slightly different driver approach. Reviewed by: des, gavin, rpaulo MFC after: 3 weeks
* x86 cpu features: add MOVBE reporting and flagavg2009-11-302-1/+2
| | | | | The check is glimpsed from Linux and OpenSolaris. MOVBE instruction is found in Intel Atom processors.
* Simplify the invocation of vm_fault(). Specifically, eliminate the flagalc2009-11-271-3/+1
| | | | | | | VM_FAULT_DIRTY. The information provided by this flag can be trivially inferred by vm_fault(). Discussed with: kib
* i386 has not (yet) any DEV_ATPIC conditional than axe it out from Xenattilio2009-11-271-4/+0
| | | | | | version. No objections by: kmacy
* fixup kernel core dumps on paravirtual guestskmacy2009-11-241-1/+1
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* - Add more aggressive BPF JIT optimization. This is in more favor of i386jkim2009-11-232-58/+105
| | | | | | | while the previous commit was more amd64-centric. - Use calloc(3) instead of malloc(3)/memset(3) in user land[1]. Submitted by: ed[1]
* Add an experimental and rudimentary JIT optimizer to reduce unncessaryjkim2009-11-212-47/+127
| | | | overhead from short BPF filter programs such as "get the first 96 bytes".
* General style cleanup, no functional change.jkim2009-11-201-32/+29
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* - Allocate scratch memory on stack instead of pre-allocating it withjkim2009-11-202-17/+27
| | | | | | | | | the filter as we do from bpf_filter()[1]. - Revert experimental use of contigmalloc(9)/contigfree(9). It has no performance benefit over malloc(9)/free(9)[2]. Requested by: rwatson[1] Pointed out by: rwatson, jhb, alc[2]
* Fix tinderbox build for i386 and sync amd64 with it.jkim2009-11-191-1/+1
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* - Change internal function bpf_jit_compile() to return allocated size ofjkim2009-11-181-9/+7
| | | | | | the generated binary and remove page size limitation for userland. - Use contigmalloc(9)/contigfree(9) instead of malloc(9)/free(9) to make sure the generated binary aligns properly and make it physically contiguous.
* - Make BPF JIT compiler working again in userland. We are limiting size ofjkim2009-11-182-12/+25
| | | | | generated native binary to page size for now. - Update copyright date and fix some style nits.
* Previous solution appeared to be unsufficient. After additional testingmav2009-11-141-18/+18
| | | | | | | | | | | | | I have found that it is not only desktop CPUs problem. but mobile also. Probably AP on laptops just started initially at lower frequency, hiding the problem. Disable frequency validation by default, for systems with more then one CPU, until we can implement it properly. It looks like making more harm now then benefits. Add 'hw.est.strict' loader tunable to control it. Now my iXsystems Invincibook is able to run at 800MHz lowest frequency, instead of 1200MHz before, when 800MHz was incorrectly reported invalid.
* Retry only once, if BIOS is completely broken and gives zero freqs.mav2009-11-141-1/+1
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* Desktop Core2Duo/Core2Quad CPUs are unable to control frequency of singlemav2009-11-141-3/+12
| | | | | | | | | | | CPU core, only pair of them. As result, both cores are running on highest one of requested frequencies, and that is reported by status register. Such behavior confuses frequency validation logic, as it runs on only one core, as SMP is not yet launched, making EIST completely unusable. To workaround this, add check for validation result. If we haven't found at least two usable frequencies, then probably we are looking bad and have to trust data provided by BIOS as-is.
* Fix cpu model for PODP5V83. It is P24T, not P54T.nyan2009-11-121-1/+1
| | | | | | | Also remove redundant 'Overdrive' word. Pointed out by: SATOU Tomokazu (tomo1770 at maple ocn ne jp) MFC after: 1 week
* - Style nits.kuriyama2009-11-121-3/+1
| | | | | | - Remove unneeded TUNABLE_INT(). Suggested by: avg, kib
* reflect that pg_ps_enabled is a tunable, not just a read-only sysctlavg2009-11-112-2/+2
| | | | Nod from: jhb
* Extract the code that records syscall results in the frame into MDkib2009-11-102-29/+37
| | | | | | | | | | | function cpu_set_syscall_retval(). Suggested by: marcel Reviewed by: marcel, davidxu PowerPC, ARM, ia64 changes: marcel Sparc64 tested and reviewed by: marius, also sunv reviewed MIPS tested by: gonzo MFC after: 1 month
* Make isa_dma functions MPSAFE by introducing its own private lock. Theserdivacky2009-11-091-27/+83
| | | | | | | | | | | | | | | | | | functions are selfcontained (ie. they touch only isa_dma.c static variables and hardware) so a private lock is sufficient to prevent races. This changes only i386/amd64 while there are also isa_dma functions for ia64/sparc64. Sparc64 are ones empty stubs and ia64 ones are unused as ia64 does not have isa (says marcel). This patch removes explicit locking of Giant from a few drivers (there are some that requires this but lack ones - this patch fixes this) and also removes the need for implicit locking of Giant from attach routines where it's provided by newbus. Approved by: ed (mentor, implicit) Reviewed by: jhb, attilio (glanced by) Tested by: Giovanni Trematerra <giovanni.trematerra gmail com> IA64 clue: marcel
* - Add hw.clflush_disable loader tunable to avoid panic (trap 9) atkuriyama2009-11-091-1/+18
| | | | | | | | | | | | | | map_invalidate_cache_range() even if CPU is not Intel. - This tunable can be set to -1 (default), 0 and 1. -1 is same as current behavior, which automatically disable CLFLUSH on Intel CPUs without CPUID_SS (should be occured on Xen only). You can specify 1 when this panic happened on non-Intel CPUs (such as AMD's). Because disabling CLFLUSH may reduce performance, you can try with setting 0 on Intel CPUs without SS to use CLFLUSH feature. Reviewed by: kib Reported by: karl, kuriyama Related to: kern/138863
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