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* Merge branch 'stable/10' into develRenato Botelho2015-10-071-6/+7
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| * MFC r288000:kib2015-09-271-6/+7
| | | | | | | | Add support for weak symbols to the kernel linkers.
* | Fix kernel conf files permissionsRenato Botelho2015-09-252-0/+0
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* | Merge branch 'stable/10' into develRenato Botelho2015-09-221-2/+3
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| * MFC r280957rstone2015-09-171-2/+3
| | | | | | | | | | | | | | | | | | | | | | Fix integer truncation bug in malloc(9) A couple of internal functions used by malloc(9) and uma truncated a size_t down to an int. This could cause any number of issues (e.g. indefinite sleeps, memory corruption) if any kernel subsystem tried to allocate 2GB or more through malloc. zfs would attempt such an allocation when run on a system with 2TB or more of RAM.
* | Merge branch 'stable/10' into develRenato Botelho2015-08-262-41/+109
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| * MFC r286667 & r286723marcel2015-08-252-41/+109
| | | | | | | | | | | | | | Better support memory mapped console devices, such as VGA and EFI frame buffers and memory mapped UARTs. PR: 191564, 194952, 202276
* | Rename pfSense kernels to match PRODUCT_NAME variable from build toolsRenato Botelho2015-08-244-3/+3
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* | Remove IPFIREWALL_VERBOSE_LIMIT from pfSense kernelsRenato Botelho2015-08-212-4/+0
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* | Add PFSENSE_WRAP and PFSENSE_WRAP_VGA kernel configs for i386Renato Botelho2015-08-212-0/+412
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* | Add a symlink for default pfSense kernel on i386 confRenato Botelho2015-08-211-0/+1
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* MFC r286288:kib2015-08-184-3/+9
| | | | Give large kernel stack to the initial thread.
* MFC r286228:kib2015-08-172-0/+3
| | | | Clear the IA32_MISC_ENABLE MSR bit on APs.
* MFC r285643:kib2015-08-071-5/+5
| | | | | When checking for the valid value of the frame pointer, verify that it belongs to the kernel stack address range for the thread.
* Implement x86 ptrace(2) requests PT_{GET,SET}{FS,GS}BASE.kib2015-08-053-35/+78
| | | | | | | | | | | | | | | | | | | | | | MFC r284918: Add helper fill_based_sd(9). MFC r284919: Add x86 PT_GETFSBASE, PT_GETGSBASE machine-depended ptrace requests to obtain the thread %fs and %gs bases. Add x86 PT_SETFSBASE and PT_SETGSBASE requests to set the bases from debuggers. The set requests, similarly to the sysarch({I386,AMD64}_SET_FSBASE), override the corresponding segment registers. MFC r284965: Document x86 machine-specific ptrace(2) requests. MFC r285011: Disallow a debugger on 64bit system to set fs/gs bases of the 32bit process beyond the end of the process address space. MFC r285104: Grammar and language fixes.
* MFC r285041:kib2015-08-053-4/+4
| | | | | Use single instance of the identical INKERNEL() and PMC_IN_KERNEL() macros on amd64 and i386. On i386, correct the lowest kernel address.
* MFC r286131:gjb2015-07-311-1/+2
| | | | | | | | Pull pmspcv (pms(4)) from GENERIC. It has PCI ID conflicts with ahd(4), mvs(4), and likely other drivers. With hat: re Sponsored by: The FreeBSD Foundation
* Merge driver for PMC Sierra's range of SAS/SATA HBAs.scottl2015-07-232-0/+4
| | | | | Submitted by: Achim Leubner <Achim.Leubner@pmcs.com> Approved by: re
* MFC r282213:trasz2015-06-211-0/+3
| | | | | | | | | | | | | | | | | | Add kern.racct.enable tunable and RACCT_DISABLED config option. The point of this is to be able to add RACCT (with RACCT_DISABLED) to GENERIC, to avoid having to rebuild the kernel to use rctl(8). MFC r282901: Build GENERIC with RACCT/RCTL support by default. Note that it still needs to be enabled by adding "kern.racct.enable=1" to /boot/loader.conf. Note those two are MFC-ed together, because the latter one changes the name of RACCT_DISABLED option to RACCT_DEFAULT_TO_DISABLED. Should have committed the renaming separately... Relnotes: yes Sponsored by: The FreeBSD Foundation
* MFC r284167:dim2015-06-201-6/+2
| | | | | | | | | | | | | | | Merge r283870 from amd64: Remove unneeded NULL checks in trap_fatal(). Since td_name is an array member of struct thread, it can never be NULL, so the check can be removed. In addition, curproc can never be NULL, so remove the if statement, and splice the two printfs() together. While here, remove the u_long cast, and use the correct printf format specifier for curproc->p_pid. Requested by: jhb
* MFC r284104:kib2015-06-132-0/+2
| | | | Updates from SDM rev. 55.
* MFC 281887:jhb2015-06-021-1/+1
| | | | | Reassign copyright statements on several files from Advanced Computing Technologies LLC to Hudson River Trading LLC.
* MFC r282708:kib2015-05-242-3/+25
| | | | | On exec, single-threading must be enforced before arguments space is allocated from exec_map.
* Fix a i386 build failure cause by commit r283280.whu2015-05-221-0/+1
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* MFC r282212:whu2015-05-222-1/+22
| | | | | | | | | | | | | | | | | | | | | Microsoft vmbus, storage and other related driver enhancements for HyperV. - Vmbus multi channel support. - Vector interrupt support. - Signal optimization. - Storvsc driver performance improvement. - Scatter and gather support for storvsc driver. - Minor bug fix for KVP driver. Thanks royger, jhb and delphij from FreeBSD community for the reviews and comments. Also thanks Hovy Xu from NetApp for the contributions to the storvsc driver. PR: 195238 Submitted by: whu Reviewed by: royger Approved by: royger Relnotes: yes Sponsored by: Microsoft OSTC Differential Revision: https://reviews.freebsd.org/D2575
* MFC r282921:jimharris2015-05-181-0/+4
| | | | | | Add nvme and nvd drivers to GENERIC for amd64 and i386. Sponsored by: Intel
* MFC r281762:kib2015-04-271-9/+0
| | | | | Remove duplicate definitions of MWAIT_CX hints. Identical defines in specialreg.h are enough.
* MFC r281495:kib2015-04-2714-51/+54
| | | | | | | | | | | | Add config option PAE_TABLES for the i386 kernel. It switches pmap to use PAE format for the page tables, but does not incur other consequences of the full PAE config. In particular, vm_paddr_t and bus_addr_t are left 32bit, and max supported memory is still limited by 4GB. The option allows to have nx permissions for memory mappings on i386 kernel, while keeping the usual i386 KBI and avoiding the kernel data sizing problems typical for the PAE config.
* MFC 278325,280866:jhb2015-04-151-6/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Revert the IPI startup sequence to match what is described in the Intel Multiprocessor Specification v1.4. The Intel SDM claims that 278325: Revert the IPI startup sequence to match what is described in the Intel Multiprocessor Specification v1.4. The Intel SDM claims that the INIT IPIs here are invalid, but other systems follow the MP spec instead. While here, fix the IPI wait routine to accept a timeout in microseconds instead of a raw spin count, and don't spin forever during AP startup. Instead, panic if a STARTUP IPI is not delivered after 20 us. 280866: Wait 100 microseconds for a local APIC to dispatch each startup-related IPI rather than 20. The MP 1.4 specification states in Appendix B.2: "A period of 20 microseconds should be sufficient for IPI dispatch to complete under normal operating conditions". (Note that this appears to be separate from the 10 millisecond (INIT) and 200 microsecond (STARTUP) waits after the IPIs are dispatched.) The Intel SDM is silent on this issue as far as I can tell. At least some hardware requires 60 microseconds as noted in the PR, so bump this to 100 to be on the safe side. PR: 196542, 197756
* MFC r281272:kib2015-04-151-3/+8
| | | | | | | Explain that vm_page_array is mapped to describe the memory, not the memory itself. Provide the formula to calculate the number of required page tables. Correct the size of the struct vm_page for non-PAE case.
* MFC 276724:jhb2015-04-021-1/+1
| | | | | | | | | | On some Intel CPUs with a P-state but not C-state invariant TSC the TSC may also halt in C2 and not just C3 (it seems that in some cases the BIOS advertises its C3 state as a C2 state in _CST). Just play it safe and disable both C2 and C3 states if a user forces the use of the TSC as the timecounter on such CPUs. PR: 192316
* MFC 261790:jhb2015-04-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | Add support for managing PCI bus numbers. As with BARs and PCI-PCI bridge I/O windows, the default is to preserve the firmware-assigned resources. PCI bus numbers are only managed if NEW_PCIB is enabled and the architecture defines a PCI_RES_BUS resource type. - Add a helper API to create top-level PCI bus resource managers for each PCI domain/segment. Host-PCI bridge drivers use this API to allocate bus numbers from their associated domain. - Change the PCI bus and CardBus drivers to allocate a bus resource for their bus number from the parent PCI bridge device. - Change the PCI-PCI and PCI-CardBus bridge drivers to allocate the full range of bus numbers from secbus to subbus from their parent bridge. The drivers also always program their primary bus register. The bridge drivers also support growing their bus range by extending the bus resource and updating subbus to match the larger range. - Add support for managing PCI bus resources to the Host-PCI bridge drivers used for amd64 and i386 (acpi_pcib, mptable_pcib, legacy_pcib, and qpi_pcib). - Define a PCI_RES_BUS resource type for amd64 and i386. PR: 197076
* MFC r278655:markj2015-03-191-1/+21
| | | | Add support for decoding multibyte NOPs.
* Merge r263233 from HEAD to stable/10:rwatson2015-03-195-5/+5
| | | | | | | | | Update kernel inclusions of capability.h to use capsicum.h instead; some further refinement is required as some device drivers intended to be portable over FreeBSD versions rely on __FreeBSD_version to decide whether to include capability.h. Sponsored by: Google, Inc.
* MFC r279936:kib2015-03-151-2/+0
| | | | Remove write-only variable.
* MFC 274817,274878,276801,276840,278976:jhb2015-02-233-5/+73
| | | | | | | | | | | | | | | | Improve support for XSAVE with debuggers. - Dump an NT_X86_XSTATE note if XSAVE is in use. This note is designed to match what Linux does in that 1) it dumps the entire XSAVE area including the fxsave state, and 2) it stashes a copy of the current xsave mask in the unused padding between the fxsave state and the xstate header at the same location used by Linux. - Teach readelf() to recognize NT_X86_XSTATE notes. - Change PT_GET/SETXSTATE to take the entire XSAVE state instead of only the extra portion. This avoids having to always make two ptrace() calls to get or set the full XSAVE state. - Add a PT_GET_XSTATE_INFO which returns the length of the current XSTATE save area (so the size of the buffer needed for PT_GETXSTATE) and the current XSAVE mask (%xcr0).
* MFC r277643:kib2015-02-141-4/+0
| | | | | | | Remove Giant from /dev/mem and /dev/kmem. MFC r277743: Arm: ensure that _tmppt KVA is used exclusively.
* MFC 273800:jhb2015-02-101-0/+2
| | | | | | | | | | | | | Rework virtual machine hypervisor detection. - Move the existing code to x86/x86/identcpu.c since it is x86-specific. - If the CPUID2_HV flag is set, assume a hypervisor is present and query the 0x40000000 leaf to determine the hypervisor vendor ID. Export the vendor ID and the highest supported hypervisor CPUID leaf via hv_vendor[] and hv_high variables, respectively. The hv_vendor[] array is also exported via the hw.hv_vendor sysctl. - Merge the VMWare detection code from tsc.c into the new probe in identcpu.c. Add a VM_GUEST_VMWARE to identify vmware and use that in the TSC code to identify VMWare.
* MFC: r276377, r276714marius2015-02-082-72/+12
| | | | | | | | - No longer exclude malo(4) and mwl(4), they have been fixed in r275870 (MFCed to stable/10 in r278415) and r275871 (MFCed to stable/10 in r278416) respectively to build with PAE enabled. - For the PAE kernel configuration file, no longer exclude devices that are known to be 64-bit DMA clean from amd64.
* MFC: r274054 (missed in r276076)marius2015-02-081-1/+1
| | | | Fix XEN kernel build.
* MFC r278001:kib2015-02-071-3/+3
| | | | Do not qualify the mcontext_t *mcp argument for set_mcontext(9) as const.
* MFC r277047:kib2015-01-192-0/+2
| | | | For x86, read MAXPHYADDR into variable cpu_maxphyaddr.
* MFC r265329:nwhitehorn2015-01-111-0/+2
| | | | | | | | | Disable ACPI and P4TCC throttling by default, following discussion on freebsd-current. These CPU speed control techniques are usually unhelpful at best. For now, continue building the relevant code into GENERIC so that it can trivially be re-enabled at runtime if anyone wants it. Relnotes: yes
* Regen for r276810.dchagin2015-01-085-7/+7
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* MFC r276508, r276509:dchagin2015-01-081-1/+1
| | | | Correct an argument status of wait4 syscall for Linuxulator.
* MFC r273701, r274556alc2015-01-022-3/+20
| | | | | | | | | | | By the time that pmap_init() runs, vm_phys_segs[] has been initialized. Obtaining the end of memory address from vm_phys_segs[] is a little easier than obtaining it from phys_avail[]. Enable the use of VM_PHYSSEG_SPARSE on amd64 and i386, making it the default on i386 PAE. (The use of VM_PHYSSEG_SPARSE on i386 PAE saves us some precious kernel virtual address space that would have been wasted on unused vm_page structures.)
* MFC: r272492nyan2014-12-231-4/+305
| | | | Merge pc98's machdep.c into i386/i386/machdep.c.
* MFC 275035:jhb2014-12-221-1/+7
| | | | | MFamd64: Check for invalid flags in the machine context in sigreturn() and setcontext().
* MFC 273988,273989,273995,274057:jhb2014-12-2215-289/+818
| | | | | MFamd64: Add support for extended FPU states on i386. This includes support for AVX on i386.
* MFC 273991:jhb2014-12-224-4/+2
| | | | | MFamd64: Move extern declaration of _ucodesel and _udatasel to <machine/md_var.h>
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