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path: root/sys/i386/pci/pci_bus.c
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* Add back an include to fix the build for the CPU_ELAN case.jhb2004-02-191-0/+3
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* Switch to using the new $PIR interrupt routing code and remove the oldjhb2004-02-181-10/+12
| | | | | code. The pci_cfgreg.c file now just controls reading/writing PCI config registers.
* Lower the priority of the legacy host to pci bridge driver so that otherjhb2003-10-311-1/+1
| | | | non-ACPI host-bridge drivers can preempt this driver.
* - Rename PCIx_HEADERTYPE* to PCIx_HDRTYPE* so the constants aren't so long.jhb2003-08-281-3/+3
| | | | | | | | | | | - Add a new PCIM_HDRTYPE constant for the field in PCIR_HDRTYPE that holds the header type. - Replace several magic numbers with appropriate constants for the header type register and a couple of PCI_FUNCMAX. - Merge to amd64 the fix to the i386 bridge code to skip devices with unknown header types. Requested by: imp (1, 2)
* Prefer new location of pci include files (which have only been in theimp2003-08-221-3/+3
| | | | | tree for two or more years now), except in a few places where there's code to be compatible with older versions of FreeBSD.
* The MI code was modified to filter the devices based on its headerimp2003-08-011-0/+8
| | | | | | | | | | | | type. We know about header types 0, 1 and 2. Ignore the rest in the MD i386 code when we're looking for bridges. You cannot look at the vendor tag. And if you don't you certainly can't look at function > 0 if the device isn't there. The new soekris boards' GEODE cpu has issues with the old way. This is reported to have fixed it. MFC After: 2 days
* - Rename nexus_pcib to legacy_pcib. I've been meaning to do this for ajhb2003-06-061-56/+50
| | | | | | | | | | | | | while after the legacy device was added since this driver hangs from legacy and not nexus. - Make several methods non-static so they can be reused in a mptable host -> pci bridge driver that will be added at a later date. - Let legacy_pcib() use pcibios_pcib_route_interrupt() directly instead of wrapping it in a private function. Originally, I thought I was going to have the nexus_pcib() driver make a runtime APIC vs. 8259A check and call the appropriate routing method (MPTable vs. PIR) that way, but it ended up being cleaner to make nexus_pcib() just work with PIR and have a separate host -> pci bridge driver for the mptable/apic case.
* Use the secondary bus number instead of the number of the bus the PCI-PCIjhb2003-06-061-1/+5
| | | | | | bridge lives on (i.e., the parent bus) when probing the PIR table for a bus. This could cause the PCIBIOS PCI-PCI bridge driver to bogusly attach to bridges that weren't in the PIR but whose parent bus was in the PIR.
* Use __FBSDID().obrien2003-06-021-3/+3
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* Remove unused variable.phk2003-05-311-2/+1
| | | | Found by: FlexeLint
* Initiate de-orbit burn for USE_PCI_BIOS_FOR_READ_WRITE. This has beenpeter2003-02-181-18/+0
| | | | | | | | | | | | | | #if'ed out for a while. Complete the deed and tidy up some other bits. We need to be able to call this stuff from outer edges of interrupt handlers for devices that have the ISR bits in pci config space. Making the bios code mpsafe was just too hairy. We had also stubbed it out some time ago due to there simply being too much brokenness in too many systems. This adds a leaf lock so that it is safe to use pci_read_config() and pci_write_config() from interrupt handlers. We still will use pcibios to do interrupt routing if there is no acpi.. [yes, I tested this] Briefly glanced at by: imp
* Outdent the string rather than use concatenation.phk2002-12-231-2/+2
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* Recognize the Serverworks CIOB30 host to pci bridge.peter2002-11-131-0/+5
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* Revert last commit, there actually was a -1 waaaaay down in pcireg_cfgread().phk2002-10-201-0/+2
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* "id" is never going to be -1 when it is unsigned.phk2002-10-201-2/+0
| | | | Spotted by: FlexeLint
* Use the global pcib devclass instead of our own static copy.jhb2002-10-161-2/+0
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* Add 2 Ids for new ServerWorks host to PCI bridge chipset.iwasaki2002-10-021-0/+8
| | | | | | | | | These are still unknown name but these are working as well as the other ServerWorks chipset. Description strings should be corrected when the chipsets are known. MFC after: 1 week
* Now that we only probe host-PCI bridges once, we no longer have to check tojhb2002-09-231-10/+0
| | | | see if we have been probed before by checking for a pciX bus device.
* Change the nexus_pcib driver (eventually to be renamed to legacy_pcib) tojhb2002-09-231-7/+7
| | | | hang off of the legacy driver instead of the nexus.
* #include "opt_bla.h" goes first says Bruce.phk2002-09-091-2/+2
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* Fix style(9) bugs.phk2002-09-081-2/+2
| | | | Brucified by: bde
* Add a subclass of the PCI-PCI bridge driver that uses the PCIBIOS tojhb2002-09-061-2/+69
| | | | | | | | | | route interrupts if the child bus is described in the PCIBIOS interrupt routing table. For child busses that are in the routing table, they do not necessarily use a 'swizzle' on their pins on the parent bus to route interrupts for child devices. If the child bus is an embedded device then the pins on the child devices can be (and usually are) directly connected either to a PIC or to a Interrupt Router. This fixes PCIBIOS interrupt routing across PCI-PCI bridges for embedded devices.
* - Add a pci_cfgintr_valid() function to see if a given IRQ is a validjhb2002-09-061-1/+2
| | | | | | | | | | | | IRQ for an entry in a PCIBIOS interrupt routing ($PIR) table. - Change pci_cfgintr() to except the current IRQ of a device as a fourth argument and to use that IRQ for the device if it is valid. - If an intpin entry in a $PIR entry has a link of 0, it means that that intpin isn't connected to anything that can trigger an interrupt. Thus, test the link against 0 to find invalid entries in the table instead of implicitly relying on the irqs field to be zero. In the machines I have looked at, intpin entries with a link of 0 often have the bits for all possible interrupts for PCI devices set.
* Prefer the physical bus number of the PCI bus as the unit of the pciXjhb2002-09-061-1/+1
| | | | device created.
* Change the support for AMDs ElanSC520 CPU from being a device driver tophk2002-09-041-0/+7
| | | | | | | | be options CPU_ELAN (NB: Soekris.com users!) It is cleaner this way. We still recognize the cpu on the host-pci bridge.
* Move a prototype to the least wrong place.phk2002-08-021-0/+1
| | | | Suggested by: bde
* Add support for probing secondary buses on the ServerWorks Grand Championgallatin2002-07-191-0/+11
| | | | | | | | chipset used for P4-Xeon machines PR: kern/38894 Tested-by: "Marc G. Fournier" <scrappy@hub.org> Submitted-by: Mark Tinguely (partially)
* Add initialization code for the AMD Elan sc520 which maps the MMCRphk2002-07-181-0/+2
| | | | into KVM and sets the i8254 frequency to the correct value.
* Add an entry for the AMD Elan SC520 hostbridge. I do not belive we canphk2002-07-181-0/+3
| | | | | | identify this gadget on the CPUID result alone, so I intend to activate the necessary magic (i8254 frequency for instance) for it based on the precense of the on-chip host to PCI bridge.
* Fix a PNPID in a commentimp2002-04-241-1/+1
| | | | Submitted by: David Xu
* Major rework of the iicbus/smbus framework:nsouch2002-03-231-0/+13
| | | | | | | | - VIA chipset SMBus controllers added - alpm driver updated - Support for dynamic modules added - bktr FreeBSD smbus updated but not tested - cleanup
* Add identification string for AMD-761 host to PCI bridge.murray2001-12-101-0/+3
| | | | PR: kern/32255
* Detect a certain type of PCIBIOS brain damage. For some reason,peter2001-08-211-0/+18
| | | | | | | | | | | | some bios vendors took it apon themselves to "censor" the host->pci bridges from PCIBIOS callers, even when the caller explicitly asks for them. This includes certain Compaq machines (eg: DL360) and some laptops. If we detect this, shut down pcibios and revert to using IO port bashing. Under -current, apcica does a better job anyway.
* Next phase in the PCI subsystem cleanup.msmith2000-12-081-2/+2
| | | | | | | | | | | | | | | | | | | | - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
* Hack to work around a probe which will lock up at least some i450GX-basedmsmith2000-11-081-1/+5
| | | | | | | | | | | | | systems. From the PR: When 'probe.slot' is PCI_SLOTMAX (== 31) and 'probe.func' is 7, call to 'pci_cfgread()' here and machine suddenly hangs up. I don't know why... (or 450GX chipset's bug?) PR: i386/20379 Submitted by: Masayuki FUKUI <fukui@sonic.nm.fujitsu.co.jp>
* Return -10000 in pci_hostb_probe to allow agp driver (disabled otherwise)ache2000-10-201-1/+1
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* Add i815 Host to Hubache2000-10-201-0/+3
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* Add the ability to use the $PIR table in the BIOS to route interruptsimp2000-10-161-0/+9
| | | | | | on demand. Submitted by: msmith
* Change the text for the ServerWorks north bridge chips. RCC is nowalc2000-10-141-4/+4
| | | | officially listed as ServerWorks by www.pcisig.com.
* When testing for PCI bus overlap with another enumerator, make sure wemsmith2000-10-111-1/+1
| | | | | | | check for the right bus number. This is still not quite right, but fixes things for multi-bus machines again. Submitted by: tegge
* Only attach "legacy" PCI busses if none have been attached via any othermsmith2000-10-091-3/+23
| | | | method.
* Move the i386 PCI attachment code out of i386/isa back into i386/pci.msmith2000-10-021-326/+8
| | | | | Split out the configuration space access primitives, as these are needed elsewhere as well.
* Get out the roto-rooter and clean up the abuse of nexus ivars by thepeter2000-09-281-19/+6
| | | | | | | | | | | | i386/isa/pcibus.c. This gets -current running again on multiple host->pci machines after the most recent nexus commits. I had discussed this with Mike Smith, but ended up doing it slightly differently to what we discussed as it turned out cleaner this way. Mike was suggesting creating a new resource (SYS_RES_PCIBUS) or something and using *_[gs]et_resource(), but IMHO that wasn't ideal as SYS_RES_* is meant to be a global platform property, not a quirk of a given implementation. This does use the ivar methods but does so properly. It also now prints the physical pci bus that a host->pci bridge (pcib) corresponds to.
* Catch a few more bogosities in certain chipsets before they mess us up.peter2000-09-051-19/+89
| | | | | | | | | | | | | Some have dual host->PCI bridges for the same logical pci bus (!), eg: some of the RCC chipsets. This is a 32/64 bit 33/66MHz and dual pci voltage motherboard so persumably there are electical or signalling differences but they are otherwise the same logical bus. The new PCI probe code however was getting somewhat upset about it and ended up creating two pci bridges to the same logical bus, which caused devices on that logical bus to appear and be probed twice. The ACPI data on this box correctly identifies this stuff, so bring on ACPI! :-)
* Take a shot at fixing multiple pci busses on i386.peter2000-08-311-10/+50
| | | | | | | | pcib_set_bus() cannot be used on the new child because it is meant to be used on the *pci* device (it looks at the parent internally) not the pcib being added. Bite the bullet and use ivars for the bus number to avoid any doubts about whether the softc is consistant between probe and attach. This should not break the Alpha code.
* * Completely rewrite the alpha busspace to hide the implementation fromdfr2000-08-281-48/+84
| | | | | | | | | | | | the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
* Add PnP probe methods to some common AT hardware drivers. In each case,msmith2000-06-231-0/+54
| | | | | | | | | the PnP probe is merely a stub as we make assumptions about some of this hardware before we have probed it. Since these devices (with the exception of the speaker) are 'standard', suppress output in the !bootverbose case to clean up the probe messages somewhat.
* Add OPTi 82C700 chipset.kuriyama2000-05-241-0/+3
| | | | | Submitted by: sanpei@sanpei.org PR: kern/18155 (part of)
* Add 440MX chipset.kuriyama2000-05-241-0/+3
| | | | | Submitted by: YOSHIMURA Hideaki <hideakiy@cs-tokyo01.chuosystem.co.jp> References: [bsd-nomads:13764]
* Don't assume that the PCI BIOS is going to clear the unused bits in %ecxmsmith2000-05-041-1/+5
| | | | when it returns.
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