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* MFC r279936:kib2015-03-151-2/+0
* MFC 274817,274878,276801,276840,278976:jhb2015-02-231-0/+7
* MFC 273988,273989,273995,274057:jhb2014-12-221-156/+399
* MFC 270850,271053,271192,271717:jhb2014-09-221-0/+37
* MFC r267767:kib2014-06-301-0/+7
* Implement vector callback for PVHVM and unify event channel implementationsgibbs2013-08-291-1/+1
* - Correct spelling in commentsgabor2013-04-171-1/+1
* - Correct mispellings of word miscellaneousgabor2013-04-171-1/+1
* Locking for todr got pushed down into inittodr and the clientimp2013-02-211-10/+2
* Revert previous commit...kevlo2012-10-101-1/+1
* Prefer NULL over 0 for pointerskevlo2012-10-091-1/+1
* Change (unused) prototype for stmxcsr() to match reality.kib2012-07-301-1/+1
* MFamd64 r238623:kib2012-07-261-15/+14
* MFCamd64 r238598:kib2012-07-211-2/+25
* MFamd64 r238668:kib2012-07-211-16/+13
* MFamd64 r238597:kib2012-07-211-0/+2
* Add a clts() wrapper around the 'clts' instruction to <machine/cpufunc.h>jhb2012-07-091-11/+8
* Add support for the extended FPU states on amd64, both for nativekib2012-01-211-1/+45
* Use atomic load & store for TSC frequency. It may be overkill for amd64 butjkim2011-04-071-11/+17
* Deprecate rarely used tsc_is_broken. Instead, we zero out tsc_freq becausejkim2011-03-101-1/+1
* In fpudna()/npxdna(), mark FPU context initialized and optionallykib2010-12-121-1/+3
* Remove npxgetregs(), npxsetregs(), fpugetregs() and fpusetregs()kib2010-11-261-72/+22
* Use unambiguous inline assembly to load a float variable. GNU asdim2010-11-251-1/+1
* Use 'saveintr' instead of 'savecrit' or 'eflags' to hold the state returnedjhb2010-10-251-3/+3
* Simplify fldcw() macro. There is no reason to use pointer here. No objectjkim2010-07-261-5/+5
* Remove an unused macro since r189418.jkim2010-07-261-1/+0
* Reduce diff against fenv.h:jkim2010-07-261-12/+14
* FNSTSW instruction can use AX register as an operand.jkim2010-07-261-1/+1
* After the FPU use requires #MF working due to INT13 FPU exception handlingkib2010-06-231-35/+27
* Remove the support for int13 FPU exception reporting on i386. It iskib2010-06-231-132/+31
* Remove unused i586 optimized bcopy/bzero/etc implementations that utilizekib2010-06-231-54/+1
* Introduce the x86 kernel interfaces to allow kernel code to usekib2010-06-051-19/+158
* Introduce the new kernel sub-tree x86 which should contain all the codeattilio2010-02-259-2735/+0
* - Allow clock subsystem to be compiled without the apic support [0]attilio2010-01-171-2/+0
* Handling all the three clocks (hardclock, softclock, profclock) with theattilio2010-01-151-7/+8
* Make isa_dma functions MPSAFE by introducing its own private lock. Theserdivacky2009-11-091-27/+83
* - Teach vesa(4) and dpms(4) about x86emu. [1]delphij2009-09-092-1926/+0
* Partially revert 196524: this part of change should not be committed asdelphij2009-08-311-20/+25
* Fix build broken in r196524.glebius2009-08-251-8/+0
* Fix VESA modes and allow 8bit depth modes.delphij2009-08-241-21/+24
* Improve the handling of cpuset with interrupts.jhb2009-07-011-2/+2
* Make algorithm a bit more bulletproof.mav2009-06-231-2/+2
* Rework r193814:mav2009-06-231-36/+32
* When using i8254 as the only kernel timer source:ariff2009-06-091-7/+31
* Add line width calculations for 15/16 and 24/32 bit modes in casedelphij2009-06-091-0/+8
* Rename statclock_disable variable to atrtcclock_disable that it actually is,mav2009-05-031-21/+15
* Add support for using i8254 and rtc timers as event sources for i386 SMPmav2009-05-021-2/+49
* Fix a few nits in the earlier changes to prevent local information leakagejhb2009-03-251-4/+8
* Rename (fpu|npx)_cleanstate to (fpu|npx)_initialstate to better reflectjhb2009-03-251-13/+13
* A better fix for handling different FPU initial control words for differentjhb2009-03-051-0/+11
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