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* Introduce the new kernel sub-tree x86 which should contain all the codeattilio2010-02-251-107/+0
| | | | | | | | | | | | | | shared and generalized between our current amd64, i386 and pc98. This is just an initial step that should lead to a more complete effort. For the moment, a very simple porting of cpufreq modules, BIOS calls and the whole MD specific ISA bus part is added to the sub-tree but ideally a lot of code might be added and more shared support should grow. Sponsored by: Sandvine Incorporated Reviewed by: emaste, kib, jhb, imp Discussed on: arch MFC: 3 weeks
* Remove advertising clause from University of California Regent'simp2004-04-071-4/+0
| | | | | | | license, per letter dated July 22, 1999 and email from Peter Wemm, Alan Cox and Robert Watson. Approved by: core, peter, alc, rwatson
* Split pc98 support into pc98/pc98/nmi.c.nyan2003-11-041-22/+1
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* Move the NMI handling code out to its own file.jhb2003-11-031-586/+2
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* Use __FBSDID().obrien2003-06-021-1/+3
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* Style nits.jhb2003-05-071-2/+4
| | | | Approved by: re (bmah)
* Use repo-copied files in sys/i386/bios.mdodd2003-03-241-1/+1
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* Remove a boatload of '&' which are surplus to the requirements.phk2002-10-201-41/+41
| | | | Validated by: md5 hash is unchanged.
* The clock is already allocated as 'fast' - no need to try and intercept apeter2002-07-081-8/+0
| | | | 'slow' interrupt registration and convert it into 'fast'.
* Change callers of mtx_init() to pass in an appropriate lock type name. Injhb2002-04-041-1/+1
| | | | | | | most cases NULL is passed, but in some cases such as network driver locks (which use the MTX_NETWORK_LOCK macro) and UMA zone locks, a name is used. Tested on: i386, alpha, sparc64
* Compromise for critical*()/cpu_critical*() recommit. Cleanup the interruptdillon2002-03-271-0/+46
| | | | | | | | | | | | | | | | | | | disablement assumptions in kern_fork.c by adding another API call, cpu_critical_fork_exit(). Cleanup the td_savecrit field by moving it from MI to MD. Temporarily move cpu_critical*() from <arch>/include/cpufunc.h to <arch>/<arch>/critical.c (stage-2 will clean this up). Implement interrupt deferral for i386 that allows interrupts to remain enabled inside critical sections. This also fixes an IPI interlock bug, and requires uses of icu_lock to be enclosed in a true interrupt disablement. This is the stage-1 commit. Stage-2 will occur after stage-1 has stabilized, and will move cpu_critical*() into its own header file(s) + other things. This commit may break non-i386 architectures in trivial ways. This should be temporary. Reviewed by: core Approved by: core
* Back out all the pmap related stuff I've touched over the last few days.peter2002-02-271-0/+8
| | | | | | There is some unresolved badness that has been eluding me, particularly affecting uniprocessor kernels. Turning off PG_G helped (which is a bad sign) but didn't solve it entirely. Userland programs still crashed.
* revert last commit temporarily due to whining on the lists.dillon2002-02-261-46/+0
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* STAGE-1 of 3 commit - allow (but do not require) interrupts to remaindillon2002-02-261-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enabled in critical sections and streamline critical_enter() and critical_exit(). This commit allows an architecture to leave interrupts enabled inside critical sections if it so wishes. Architectures that do not wish to do this are not effected by this change. This commit implements the feature for the I386 architecture and provides a sysctl, debug.critical_mode, which defaults to 1 (use the feature). For now you can turn the sysctl on and off at any time in order to test the architectural changes or track down bugs. This commit is just the first stage. Some areas of the code, specifically the MACHINE_CRITICAL_ENTER #ifdef'd code, is strictly temporary and will be cleaned up in the STAGE-2 commit when the critical_*() functions are moved entirely into MD files. The following changes have been made: * critical_enter() and critical_exit() for I386 now simply increment and decrement curthread->td_critnest. They no longer disable hard interrupts. When critical_exit() decrements the counter to 0 it effectively calls a routine to deal with whatever interrupts were deferred during the time the code was operating in a critical section. Other architectures are unaffected. * fork_exit() has been conditionalized to remove MD assumptions for the new code. Old code will still use the old MD assumptions in regards to hard interrupt disablement. In STAGE-2 this will be turned into a subroutine call into MD code rather then hardcoded in MI code. The new code places the burden of entering the critical section in the trampoline code where it belongs. * I386: interrupts are now enabled while we are in a critical section. The interrupt vector code has been adjusted to deal with the fact. If it detects that we are in a critical section it currently defers the interrupt by adding the appropriate bit to an interrupt mask. * In order to accomplish the deferral, icu_lock is required. This is i386-specific. Thus icu_lock can only be obtained by mainline i386 code while interrupts are hard disabled. This change has been made. * Because interrupts may or may not be hard disabled during a context switch, cpu_switch() can no longer simply assume that PSL_I will be in a consistent state. Therefore, it now saves and restores eflags. * FAST INTERRUPT PROVISION. Fast interrupts are currently deferred. The intention is to eventually allow them to operate either while we are in a critical section or, if we are able to restrict the use of sched_lock, while we are not holding the sched_lock. * ICU and APIC vector assembly for I386 cleaned up. The ICU code has been cleaned up to match the APIC code in regards to format and macro availability. Additionally, the code has been adjusted to deal with deferred interrupts. * Deferred interrupts use a per-cpu boolean int_pending, and masks ipending, spending, and fpending. Being per-cpu variables it is not currently necessary to lock; bus cycles modifying them. Note that the same mechanism will enable preemption to be incorporated as a true software interrupt without having to further hack up the critical nesting code. * Note: the old critical_enter() code in kern/kern_switch.c is currently #ifdef to be compatible with both the old and new methodology. In STAGE-2 it will be moved entirely to MD code. Performance issues: One of the purposes of this commit is to enhance critical section performance, specifically to greatly reduce bus overhead to allow the critical section code to be used to protect per-cpu caches. These caches, such as Jeff's slab allocator work, can potentially operate very quickly making the effective savings of the new critical section code's performance very significant. The second purpose of this commit is to allow architectures to enable certain interrupts while in a critical section. Specifically, the intention is to eventually allow certain FAST interrupts to operate rather then defer. The third purpose of this commit is to begin to clean up the critical_enter()/critical_exit()/cpu_critical_enter()/ cpu_critical_exit() API which currently has serious cross pollution in MI code (in fork_exit() and ast() for example). The fourth purpose of this commit is to provide a framework that allows kernel-preempting software interrupts to be implemented cleanly. This is currently used for two forward interrupts in I386. Other architectures will have the choice of using this infrastructure or building the functionality directly into critical_enter()/ critical_exit(). Finally, this commit is designed to greatly improve the flexibility of various architectures to manage critical section handling, software interrupts, preemption, and other highly integrated architecture-specific details.
* Work-in-progress commit syncing up pmap cleanups that I have been workingpeter2002-02-251-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | on for a while: - fine grained TLB shootdown for SMP on i386 - ranged TLB shootdowns.. eg: specify a range of pages to shoot down with a single IPI, since the IPI is very expensive. Adjust some callers that used to trigger this inside tight loops to do a ranged shootdown at the end instead. - PG_G support for SMP on i386 (options ENABLE_PG_G) - defer PG_G activation till after we decide what we are going to do with PSE and the 4MB pages at the start of the kernel. This should solve some rumored strangeness about stale PG_G entries getting stuck underneath the 4MB pages. - add some instrumentation for the fine TLB shootdown - convert some asm instruction wrappers from functions to inlines. gcc seems to do a fair bit better with this. - [temporarily!] pessimize the tlb shootdown IPI handlers. I will fix this again shortly. This has been working fairly well for me for a while, but I have tweaked it again prior to commit since my last major testing round. The only outstanding problem that I know of is PG_G related, which is why there is an option for it (not on by default for SMP). I have seen a world speedups by a few percent (as much as 4 or 5% in one case) but I have *not* accurately measured this - I am a bit sceptical of these numbers.
* Don't grab the ICU lock while reading the current pending interrupts andjhb2002-02-081-2/+0
| | | | | | current masked interrupts from the AT PIC. Requested by: bde
* Don't include <isa/isavar.h> or compile code depending on it when isabde2002-01-301-0/+2
| | | | | | | | is not configured. Including <isa/isavar.h> when it is not used is harmful as well as bogus, since it includes "isa_if.h" which is not generated when isa is not configured. This was fixed in 1999 but was broken by unconditionalizing PNPBIOS.
* Introduce a standard name for the lock protecting an interrupt controllerjhb2001-12-201-12/+15
| | | | | | | | and it's associated state variables: icu_lock with the name "icu". This renames the imen_mtx for x86 SMP, but also uses the lock to protect access to the 8259 PIC on x86 UP. This also adds an appropriate lock to the various Alpha chipsets which fixes problems with Alpha SMP machines dropping interrupts with an SMP kernel.
* Backout 1.61 -- both intrcnt and intrnames are already exportedluigi2001-10-251-6/+0
| | | | via sysctl under "hw".
* Export interrupt statistics via sysctl.luigi2001-10-071-0/+6
| | | | MFC-after: 3 days
* Disable the check in icu_setup() to see if a handler was already used asjhb2001-09-271-0/+2
| | | | | | | the current interrupt thread routines will guarantee the condition this is checking for at a higher level but inthand_add() and inthand_remove() as they currently exist don't satisfy this condition. (Which does need to be fixed but which will take a bit more work.) This fixes shared interrupts.
* Return EINVAL if the passed intr is out of bounds.jlemon2001-09-271-0/+1
| | | | | | PR: 30857 Submitted by: David Xu <davidx@viasoft.com.cn> MFC: 1 week
* Add ACPI attachments.msmith2001-08-301-0/+1
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* Add ACPI S2-S4BIOS Suspend/Resume code.takawata2001-07-201-1/+26
| | | | | | Some problems may remain. Reviewed by:iwasaki
* Clean up the code exporting interrupt statistics via sysctl a bit:tmm2001-06-011-1/+0
| | | | | | | | | | | | | - move the sysctl code to kern_intr.c - do not use INTRCNT_COUNT, but rather eintrcnt - intrcnt to determine the length of the intrcnt array - move the declarations of intrnames, eintrnames, intrcnt and eintrcnt from machine-dependent include files to sys/interrupt.h - remove the hw.nintr sysctl, it is not needed. - fix various style bugs Requested by: bde Reviewed by: bde (some time ago)
* Remove unneeded includes of sys/ipl.h and machine/ipl.h.jhb2001-05-151-1/+0
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* Undo part of the tangle of having sys/lock.h and sys/mutex.h included inmarkm2001-05-011-7/+8
| | | | | | | | | | | other "system" header files. Also help the deprecation of lockmgr.h by making it a sub-include of sys/lock.h and removing sys/lockmgr.h form kernel .c files. Sort sys/*.h includes where possible in affected files. OK'ed by: bde (with reservations)
* Export intrnames and intrcnt as sysctls (hw.nintr, hw.intrnames andtmm2001-03-231-0/+1
| | | | | | hw.intrcnt). Approved by: rwatson
* RIP <machine/lock.h>.markm2001-02-111-3/+0
| | | | | | | Some things needed bits of <i386/include/lock.h> - cy.c now has its own (only) copy of the COM_(UN)LOCK() macros, and IMASK_(UN)LOCK() has been moved to <i386/include/apic.h> (AKA <machine/apic.h>). Reviewed by: jhb
* Use the MI ithread helper functions in the x86 interrupt code.jhb2001-02-091-160/+83
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* Change and clean the mutex lock interface.bmilekic2001-02-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mtx_enter(lock, type) becomes: mtx_lock(lock) for sleep locks (MTX_DEF-initialized locks) mtx_lock_spin(lock) for spin locks (MTX_SPIN-initialized) similarily, for releasing a lock, we now have: mtx_unlock(lock) for MTX_DEF and mtx_unlock_spin(lock) for MTX_SPIN. We change the caller interface for the two different types of locks because the semantics are entirely different for each case, and this makes it explicitly clear and, at the same time, it rids us of the extra `type' argument. The enter->lock and exit->unlock change has been made with the idea that we're "locking data" and not "entering locked code" in mind. Further, remove all additional "flags" previously passed to the lock acquire/release routines with the exception of two: MTX_QUIET and MTX_NOSWITCH The functionality of these flags is preserved and they can be passed to the lock/unlock routines by calling the corresponding wrappers: mtx_{lock, unlock}_flags(lock, flag(s)) and mtx_{lock, unlock}_spin_flags(lock, flag(s)) for MTX_DEF and MTX_SPIN locks, respectively. Re-inline some lock acq/rel code; in the sleep lock case, we only inline the _obtain_lock()s in order to ensure that the inlined code fits into a cache line. In the spin lock case, we inline recursion and actually only perform a function call if we need to spin. This change has been made with the idea that we generally tend to avoid spin locks and that also the spin locks that we do have and are heavily used (i.e. sched_lock) do recurse, and therefore in an effort to reduce function call overhead for some architectures (such as alpha), we inline recursion for this case. Create a new malloc type for the witness code and retire from using the M_DEV type. The new type is called M_WITNESS and is only declared if WITNESS is enabled. Begin cleaning up some machdep/mutex.h code - specifically updated the "optimized" inlined code in alpha/mutex.h and wrote MTX_LOCK_SPIN and MTX_UNLOCK_SPIN asm macros for the i386/mutex.h as we presently need those. Finally, caught up to the interface changes in all sys code. Contributors: jake, jhb, jasone (in no particular order)
* Convert mca (microchannel bus support) from something that we countpeter2001-01-291-5/+5
| | | | (bogus) to something that we test for the presence of.
* Send "#if NISA > 0" to the bit-bucket and replace it with an option.peter2001-01-291-4/+3
| | | | | These were compile-time "is the isa code present?" tests and not 'how many isa busses' tests.
* Clear intr_nesting_level when an interrupt thread has no morejake2001-01-281-0/+1
| | | | | | | handlers and wants to exit, so it doesn't panic in exit1() which malloc()s with M_WAITOK. Reported by: Bob Bishop <rb@gid.co.uk>
* Make intr_nesting_level per-process, rather than per-cpu. Setupjake2001-01-211-0/+1
| | | | | | | | interrupt threads to run with it always >= 1, so that malloc can detect M_WAITOK from "interrupt" context. This is also necessary in order to context switch from sched_ithd() directly. Reviewed By: peter
* EEK! I missed a couple of places with the 24->32 interrupt change.peter2001-01-191-0/+6
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* Fix a warning (the prototypes probably shouldn't be so over-zealouslypeter2001-01-191-1/+1
| | | | #ifdef'ed though)
* Free the intrhand name when free'ing a intrhand.jhb2001-01-161-0/+1
| | | | Submitted by: bde
* Convert more malloc+bzero to malloc+M_ZERO.dwmalone2000-12-081-4/+3
| | | | | Submitted by: josh@zipperup.org Submitted by: Robert Drehmel <robd@gmx.net>
* Fix a couple of whitespace nits.jhb2000-10-271-2/+2
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* Fast interrupts have no associated process, therefore do not tryps2000-10-251-11/+13
| | | | and schedule it. This fixes booting machines with broken MP tables.
* - Overhaul the software interrupt code to use interrupt threads for eachjhb2000-10-251-33/+33
| | | | | | | | | | | | | | | | | | | type of software interrupt. Roughly, what used to be a bit in spending now maps to a swi thread. Each thread can have multiple handlers, just like a hardware interrupt thread. - Instead of using a bitmask of pending interrupts, we schedule the specific software interrupt thread to run, so spending, NSWI, and the shandlers array are no longer needed. We can now have an arbitrary number of software interrupt threads. When you register a software interrupt thread via sinthand_add(), you get back a struct intrhand that you pass to sched_swi() when you wish to schedule your swi thread to run. - Convert the name of 'struct intrec' to 'struct intrhand' as it is a bit more intuitive. Also, prefix all the members of struct intrhand with 'ih_'. - Make swi_net() a MI function since there is now no point in it being MD. Submitted by: cp
* Actually harvest interrupt threads when the last handler is removed from ajhb2000-10-201-2/+18
| | | | thread.
* - Heavyweight interrupt threads on the alpha for device I/O interrupts.jhb2000-10-051-6/+5
| | | | | | | | | | | - Make softinterrupts (SWI's) almost completely MI, and divorce them completely from the x86 hardware interrupt code. - The ihandlers array is now gone. Instead, there is a MI shandlers array that just contains SWI handlers. - Most of the former machine/ipl.h files have moved to a new sys/ipl.h. - Stub out all the spl*() functions on all architectures. Submitted by: dfr
* - Remove the inthand2_t type and use the equivalent driver_intr_t type fromjhb2000-09-131-14/+15
| | | | | | | | | | | | | newbus for referencing device interrupt handlers. - Move the 'struct intrec' type which describes interrupt sources into sys/interrupt.h instead of making it just be a x86 structure. - Don't create 'ithd' and 'intrec' typedefs, instead, just use 'struct ithd' and 'struct intrec' - Move the code to translate new-bus interrupt flags into an interrupt thread priority out of the x86 nexus code and into a MI ithread_priority() function in sys/kern/kern_intr.c. - Remove now-uneeded x86-specific headers from sys/dev/ata/ata-all.c and sys/pci/pci_compat.c.
* Major update to the way synchronization is done in the kernel. Highlightsjasone2000-09-071-380/+144
| | | | | | | | | | | | | | | include: * Mutual exclusion is used instead of spl*(). See mutex(9). (Note: The alpha port is still in transition and currently uses both.) * Per-CPU idle processes. * Interrupts are run in their own separate kernel threads and can be preempted (i386 only). Partially contributed by: BSDi (BSD/OS) Submissions by (at least): cp, dfr, dillon, grog, jake, jhb, sheldonh
* Change the behavior of isa_nmi to log an error message instead ofps2000-08-061-18/+31
| | | | | | | | | panicing and return a status so that we can decide whether to drop into DDB or panic. If the status from isa_nmi is true, panic the kernel based on machdep.panic_on_nmi, otherwise if DDB is enabled, drop to DDB based on machdep.ddb_on_nmi. Reviewed by: peter, phk
* Fixed atpic_attach() for the SMP (specifically APIC_IO) case.fsmp2000-06-241-1/+2
| | | | Approved by: msmith@freebsd.org
* Add PnP probe methods to some common AT hardware drivers. In each case,msmith2000-06-231-0/+66
| | | | | | | | | the PnP probe is merely a stub as we make assumptions about some of this hardware before we have probed it. Since these devices (with the exception of the speaker) are 'standard', suppress output in the !bootverbose case to clean up the probe messages somewhat.
* Add SWI_TQ_MASK to all interrupt masks except SWI_CLOCK_MASK. Use abde2000-05-311-2/+2
| | | | | | | new macro SWI_LOW_MASK to give the mask for low priority SWIs instead of hard-coding this mask as SWI_CLOCK_MASK. Reviewed by: dfr
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