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* $Id$ -> $FreeBSD$peter1999-08-281-1/+1
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* Implement an all-CPU shootdown-style rendezvous facility. This allowsmsmith1999-07-201-2/+6
| | | | | | | | | | | the caller to specify a function to be guarded between an entry and exit barrier, as well as pre- and post-barrier functions. The primary use for this function is synchronised update of per-cpu private data. The implementation is almost (but not quite) MI; with a better mechanism for masking per-CPU interrupts it could probably be hoisted. Reviewed by: peter (partially)
* remove references to isa_device, it's no longer associated with interrupts.peter1999-06-031-5/+1
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* Stage 1 of a cleanup of the i386 interrupt registration mechanism.peter1999-04-211-3/+16
| | | | | | | Interrupts under the new scheme are managed by the i386 nexus with the awareness of the resource manager. There is further room for optimizing the interfaces still. All the users of register_intr()/intr_create() should be gone, with the exception of pcic and i386/isa/clock.c.
* Changed the type of an isa/general interrupt handler to take abde1998-06-181-2/+2
| | | | | | `void *' arg. Fixed or hid most of the resulting type mismatches. Handlers can now be updated locally (except for reworking their global declarations in isa_device.h).
* Converted the ICU-level interrupt tests (3, 5 and 8) in sioprobe() intobde1998-05-311-5/+2
| | | | | | | | | a test of the irq number, and made failure of this test non-fatal. Removed related unused complications for the APIC_IO case. Removed the no-test3 flag. Deverbosified the failure messages for the other tests. Removed the per-port verbose flag - just use the general verbose flag.
* When entering the apic version of slow interrupt handler, leveltegge1998-03-031-1/+5
| | | | | | | | | interrupts are masked, and EOI is sent iff the corresponding ISR bit is set in the local apic. If the CPU cannot obtain the interrupt service lock (currently the global kernel lock) the interrupt is forwarded to the CPU holding that lock. Clock interrupts now have higher priority than other slow interrupts.
* Forward the signal if the process runs on a different CPU. This reducestegge1998-03-031-3/+5
| | | | | | | | the signal handling latency for cpu-bound processes that performs very few system calls. The IPI for forcing an additional software trap is no longer dependent upon BETTER_CLOCK being defined.
* Ifdefed SMP-only declarations.bde1998-02-131-3/+8
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* The improvements to clock statistics by Tor Eggefsmp1997-12-081-1/+11
| | | | | | | | | | | Wrappered and enabled by the define BETTER_CLOCK (on by default in smpyests.h) apic_vector.s also contains a small change I (smp) made to eliminate the double level INT problem. It seems stable, but I haven't the tools in place to prove it fixes the problem. Reviewed by: smp@csn.net Submitted by: Tor Egge <Tor.Egge@idi.ntnu.no>
* Support for the new FAST_HI algorithm, enabled.fsmp1997-08-291-35/+42
| | | | | Preliminary support for the INTR_SIMPLELOCK algorithm, disabled. Note that this code is NOT ready.
* SMP or APIC_IO:fsmp1997-07-191-28/+30
| | | | | | - Increased NIDT to 256. - Moved IPI vectors up above the linux compat vector. - Removed runtime setup of RTC vector.
* Split TEST_CPUSTOP code into CPUSTOP_ON_DDBBREAK and mainline code.fsmp1997-07-181-13/+7
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* Cleanup old stop_cpus/restart_cpus() cruft.fsmp1997-07-131-15/+80
| | | | | new code for handling mixed-mode 8259/APIC programming without 'ExtInt' new code to control other CPUs: stop_cpus()/restart_cpus()/_Xstopcpu
* Added a hook for a "spurious INTerrupt handler".fsmp1997-07-061-1/+9
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* apic_vector.s:fsmp1997-06-271-2/+9
| | | | | | | | | - added Xcpustop IPI code to support stop_cpus()/restart_cpus(). it is off by default, enable via smptests.h:TEST_CPUSTOP intr_machdep.h: - moved +ICULEN to lower level. - added entry for Xcpustop.
* Move interrupt handling code from isa.c to a new file. This should makedfr1997-06-021-0/+105
isa.c (slightly) more portable and will make my life developing the really portable version much easier. Reviewed by: peter, fsmp
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