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* $Id$ -> $FreeBSD$peter1999-08-281-1/+1
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* It would help if things that MUST be 32 bit aligned were really 32 bitpeter1999-08-251-3/+3
| | | | | | aligned. If I recall correctly, this is to ensure apic_imen can be accessed in a single bus cycle. Also, use TEXT_ALIGN rather than a .align 2 (which means 2 byte align on ELF and 4 byte align on a.out)
* Go back to the old (icu.s rev.1.7 1993) way of keeping the AST-pendingbde1999-07-101-3/+1
| | | | | | | bit separate from ipending, since this is simpler and/or necessary for SMP and may even be better for UP. Reviewed by: alc, luoqi, tegge
* An SMP-specific change: Add the lock prefix to RMW operationsalc1999-07-031-1/+2
| | | | on ipending.
* When trying to enable or disable an interrupt not described by the mp table,tegge1999-04-101-3/+7
| | | | just return instead of dereferencing a null pointer.
* Maintain a mapping from irq number to (ioapic number, int pin) tuple,tegge1998-09-061-11/+7
| | | | | | | | | | | | and use this when masking/unmasking interrupts. Maintain a mapping from (iopaic number, int pin) tuple to irq number, and use this when configuring devices and programming the ioapics. Previous code assumed that irq number was equal to int pin number, and that the ioapic number was 0. Don't let an AP enter _cpu_switch before all local apics are initialized.
* Implemented dynamic registration of software interrupt handlers. Notbde1998-08-111-16/+8
| | | | | | used yet. Use dummy SWI handlers to avoid some checks for null pointers.
* Mask the interrupt before setting the corresponding bit in ipending iftegge1998-04-221-2/+1
| | | | | | the interrupt is already active. Don't use lock prefix for operations on ipending. Always use lock prefix for operations on iactive.
* Remove special handling for resuming clock interrupt when using APIC_IO.tegge1998-03-051-49/+2
| | | | The `generic' vector stubs do the right thing.
* When entering the apic version of slow interrupt handler, leveltegge1998-03-031-1/+4
| | | | | | | | | interrupts are masked, and EOI is sent iff the corresponding ISR bit is set in the local apic. If the CPU cannot obtain the interrupt service lock (currently the global kernel lock) the interrupt is forwarded to the CPU holding that lock. Clock interrupts now have higher priority than other slow interrupts.
* Add support for low resolution SMP kernel profiling.tegge1997-12-151-1/+5
| | | | | | | | | | | | - A nonprofiling version of s_lock (called s_lock_np) is used by mcount. - When profiling is active, more registers are clobbered in seemingly simple assembly routines. This means that some callers needed to save/restore extra registers. - The stack pointer must have space for a 'fake' return address in idle, to avoid stack underflow.
* General cleanup of the lock pushdown code. They are grouped and enabledfsmp1997-09-071-17/+20
| | | | | | | | | from machine/smptests.h: #define PUSHDOWN_LEVEL_1 #define PUSHDOWN_LEVEL_2 #define PUSHDOWN_LEVEL_3 #define PUSHDOWN_LEVEL_4_NOT
* Support for the new FAST_HI algorithm, enabled.fsmp1997-08-291-4/+14
| | | | | Preliminary support for the INTR_SIMPLELOCK algorithm, disabled. Note that this code is NOT ready.
* The last of the encapsolation of cpl/spl/ipending things into a criticalfsmp1997-08-241-26/+87
| | | | | | | | | | | | | | | | | | | region protected by the simplelock 'cpl_lock'. Notes: - this code is currently controlled on a section by section basis with defines in machine/param.h. All sections are currently enabled. - this code is not as clean as I would like, but that can wait till later. - the "giant lock" still surrounds most instances of this "cpl region". I still have to do the code that arbitrates setting cpl between the top and bottom halves of the kernel. - the possibility of deadlock exists, I am committing the code at this point so as to exercise it and detect any such cases B4 the "giant lock" is removed.
* Made PEND_INTS default.fsmp1997-08-211-64/+3
| | | | | | | | | | Made NEW_STRATEGY default. Removed misc. old cruft. Centralized simple locks into mp_machdep.c Centralized simple lock macros into param.h More cleanup in the direction of making splxx()/cpl MP-safe.
* Preperation for moving cpl into critical region access.fsmp1997-08-201-1/+19
| | | | | | | | Several new fine-grained locks. New FAST_INTR() methods: - separate simplelock for FAST_INTR, no more giant lock. - FAST_INTR()s no longer checks ipending on way out of ISR. sio made MP-safe (I hope).
* Fixed imen alignment.fsmp1997-07-311-2/+2
| | | | Submitted by: Bruce Evans <bde@zeta.org.au>
* Removed the simplelock functions.fsmp1997-07-241-142/+11
| | | | Cleaned up the other functions.
* Fixed possible deadlock from recursive INTs on same cpu. Sincefsmp1997-07-231-3/+9
| | | | | | | we use lazy masking INTREN()/INTRDIS() might be called with INTs enabled. This means another higher prio INT to the same cpu could attempt to re-enter the critical region, but would spin waiting for the lock. Since it is the owner, it would deadlock.
* New simple_lock code in asm:fsmp1997-07-231-114/+154
| | | | | | | | | | | | | | | - s_lock_init() - s_lock() - s_lock_try() - s_unlock() Created lock for IO APIC and apic_imen (SMP version of imen) - imen_lock Code to use imen_lock for access from apic_ipl.s and apic_vector.s. Moved this code *outside* of mp_lock. It seems to work!!!
* Coded simple_lock and friends in asm.fsmp1997-07-231-21/+197
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* Last commit didn't take, operator error???fsmp1997-07-221-1/+195
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* Developed a new strategy for handling the 8254/8259/APIC issue.fsmp1997-07-201-40/+47
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* Added #code to support define APIC_PIN0_TIMER.fsmp1997-07-191-4/+25
| | | | | This code ALWAYS runs the 8254 timer thru the 8259 ICU. It depricates the usage of "options SMP_TIMER_NC" in the config file.
* SMP or APIC_IO:fsmp1997-07-191-9/+31
| | | | | | - Increased NIDT to 256. - Moved IPI vectors up above the linux compat vector. - Removed runtime setup of RTC vector.
* Split vector.s into UP and SMP specific files:fsmp1997-05-261-0/+149
- vector.s <- stub called by i386/exception.s - icu_vector.s <- UP - apic_vector.s <- SMP Split icu.s into UP and SMP specific files: - ipl.s <- stub called by i386/exception.s (formerly icu.s) - icu_ipl.s <- UP - apic_ipl.s <- SMP This was done in preparation for massive changes to the SMP INTerrupt mechanisms. More fine tuning, such as merging ipl.s into exception.s, may be appropriate.
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