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* Switch to using the new $PIR interrupt routing code and remove the oldjhb2004-02-181-2/+4
| | | | | code. The pci_cfgreg.c file now just controls reading/writing PCI config registers.
* Add new CPU_ENABLE_TCC option, from NOTES:sobomax2004-01-181-0/+3
| | | | | | | | | | | | | | CPU_ENABLE_TCC enables Thermal Control Circuitry (TCC) found in some Pentium(tm) 4 and (possibly) later CPUs. When enabled and detected, TCC allows to restrict power consumption by using machdep.cpuperf* sysctls. This operates independently of SpeedStep and is useful on systems where other mechanisms such as apm(4) or acpi(4) don't work. Given the fact that many, even modern, notebooks don't work properly with Intel ACPI, this is indeed very useful option for notebook owners. Obtained from: OpenBSD MFC after: 2 weeks
* Provide sysarch(2) prototypes in the MD sysarch.h headers. While I'mnectar2004-01-091-0/+1
| | | | | | | | | | at it, use the ANSI C generic pointer type for the second argument, thus matching the documentation. Remove the now extraneous (and now conflicting) function declarations in various libc sources. Remove now unnecessary casts. Reviewed by: bde
* Use ANSI C function definition for `_mcount' and remove `static'nectar2004-01-061-1/+0
| | | | | | prototype from header file. Discussed with: bde, maybe one year ago
* Add struct definition of the Elan MMCR registers (from jb@)phk2004-01-052-1/+280
| | | | | | | | Put a CTASSERT() on the size of the struct. Use the struct where it is easy to do so in elan_mmcr.c Add the Elan specific hardware reset code (also from jb@).
* GC the unused <machine/kse.h> file.peter2003-12-241-49/+0
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* Hey, how about we NOT make modules crash 486s?green2003-12-171-1/+1
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* - Add the mp_topology() function to mp_machdep.c. This function builds upjeff2003-12-111-0/+1
| | | | | the smp_topology structure to reflect the layout of HTT enabled machines. - Add a prototype for mp_topology() in smp.h
* Delete old and unused APIC_IRQ defines.jhb2003-12-101-32/+0
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* Add just enough of i386/include/pcvt_ioctl.h to amd64/include/pcvt_ioctl.hobrien2003-12-101-4/+0
| | | | | | such that 'ispcvt' can build. Unforunately 'ispcvt' is needed in order for /etc/rc.d/syscons to run. This fixes the bug where I could not get my keymap effective at boot.
* Move the bktr(4) <arch>/include/ioctl_{bt848,meteor}.h files to dev/bktrobrien2003-12-082-445/+36
| | | | | | as these ioctl's aren't MD. This also means they are installed in /usr/include/dev/bktr now. Also provide compatability wrappers for where these headers lived in 4.x.
* Don't remove the virtual-to-physical mapping when an sf_buf is freed.alc2003-12-071-0/+1
| | | | | | | | | | | | | | | Instead, allow the mapping to persist, but add the sf_buf to a free list. If a later sendfile(2) or zero-copy send resends the same physical page, perhaps with the same or different contents, then the mapping overhead is avoided and the sf_buf is simply removed from the free list. In other words, the i386 sf_buf implementation now behaves as a cache of virtual-to-physical translations using an LRU replacement policy on inactive sf_bufs. This is similar in concept to a part of http://www.cs.princeton.edu/~yruan/debox/ patch, but much simpler in implementation. Note: none of this is required on alpha, amd64, or ia64. They now use their direct virtual-to-physical mapping to avoid any emphemeral mapping overheads in their sf_buf implementations.
* Ooops. These are still used by the bktr driver. David O'Brien hasimp2003-12-071-0/+187
| | | | | | plans for dealing, but I'll let him deal. Pointy hat to: imp@
* Remote meteor driver. It hasn't compiled in over 3 years. If someoneimp2003-12-071-187/+0
| | | | | makes it compile again, and can test it, we can restore the driver to the tree.
* File forgotten in the cx shuffle.imp2003-12-051-484/+0
| | | | | Pointed out by: Roman Kurakin Approved by: re@ <scottl> (under go ahead and commit new cx approval)
* Updated cx driver commit part 1: bring in the new kernel driver.imp2003-12-031-0/+449
| | | | | | | | | | | | | | | | | | | | | | | | This is the vastly updated cx drvier from Roman Kurakin <rik@cronyx.ru> who has been patiently waiting for this update for sometime. The driver is mostly a rewrite from the version we have in the tree. While some similarities remain, losing the little history that the old driver has is not a big loss, and the re@ felt it was easier this way (less error prone). The userland parts of this update will be committed shortly. The driver is not connected to the build yet. I want to make sure I don't break any platform at any time, so I want to test that with these files in the tree before I continue (on the off chance I'm forgetting a file). I changed the DEBUG macro to CX_DEBUG from the code that was submitted (to not break when we go to building with opt_global.h after the release), as well adding $FreeBSD$. Submitted by: Roman Kurakin Approved by: re@ <scottl>
* MFamd64: use a less compiler-intensive MD implementation of 'curthread'peter2003-11-201-0/+10
| | | | | | so that the compiler doesn't have to do so much work. Approved by: re (jhb)
* - Change the i386's sf_buf implementation so that it never allocatesalc2003-11-171-1/+2
| | | | | | | | | | | | | | | more than one sf_buf for one vm_page. To accomplish this, we add a global hash table mapping vm_pages to sf_bufs and a reference count to each sf_buf. (This is similar to the patches for RELENG_4 at http://www.cs.princeton.edu/~yruan/debox/.) For the uninitiated, an sf_buf is nothing more than a kernel virtual address that is used for temporary virtual-to-physical mappings by sendfile(2) and zero-copy sockets. As such, there is no reason for one vm_page to have several sf_bufs mapping it. In fact, using more than one sf_buf for a single vm_page increases the likelihood that sendfile(2) blocks, hurting throughput. (See http://www.cs.princeton.edu/~yruan/debox/.)
* Fixed pedantic warnings for statement-expressions using __extension__bde2003-11-171-4/+4
| | | | | and by not using a statement-expression for the non-expression __PCPU_SET().
* Fixed a pedantic syntax error (a stray semicolon at the end ofbde2003-11-171-1/+1
| | | | PCPU_MD_FIELDS).
* Fixed pedantic syntax errors. Many macros didn't permit a semicolon afterbde2003-11-171-3/+6
| | | | | their invocation in the !KLD_MODULE case, but a semicolon is provided after all invocations and is required in the KLD_MODULE case.
* Avoid a warning for compiling with `gcc -Wbad-function cast'. (Thisbde2003-11-171-1/+5
| | | | | | is the warning that points to the bug in `(char *)malloc(...)' where malloc() is implicitly declared as returning int. We do similar things here, but they work because u_int is the same as uintptr_t on i386's.)
* - Modify alpha's sf_buf implementation to use the direct virtual-to-alc2003-11-161-0/+56
| | | | | | | | | physical mapping. - Move the sf_buf API to its own header file; make struct sf_buf's definition machine dependent. In this commit, we remove an unnecessary field from struct sf_buf on the alpha, amd64, and ia64. Ultimately, we may eliminate struct sf_buf on those architecures except as an opaque pointer that references a vm page.
* Localized the cy driver's locking.bde2003-11-161-12/+0
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* Convert a couple of pointers to integers for source compatability withpeter2003-11-141-4/+4
| | | | amd64.
* Whitespace nit (sorry, couldn't help it)peter2003-11-141-1/+1
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* Shuffle the APIC interrupt vectors around a bit:jhb2003-11-142-13/+15
| | | | | | | | | | | | | | | - Move the IPI and local APIC interrupt vectors up into the 0xf0 - 0xff range. The pmap lazyfix IPI was reordered down next to the TLB shootdowns to avoid conflicting with the spurious interrupt vector. - Move the base of APIC interrupts up 16 so that the first 16 APIC interrupts do not overlap the vectors used by the ATPIC. - Remove bogus interrupt vector reservations for LINT[01]. - Now that 0xc0 - 0xef are available, use them for device interrupts. This increases the number of APIC device interrupts to 191. - Increase the system-wide number of global interrupts to 191 to catch up to more APIC interrupts. Requested by: peter (2)
* Fix a typo.jhb2003-11-131-1/+1
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* - Move manipulation of td_intr_nesting_level out of assembly interruptjhb2003-11-122-0/+2
| | | | | | | | | | | | | | | | | | | vector stubs and into the C functions they call. - Move disabling and EOIing of interrupt sources out of PIC driver entry points and into intr_execute_handlers(). Intr_execute_handlers() only disables a source for an interrupt if it is a stray interrupt or has threaded handlers. Sources with fast handlers no longer disable (mask) the source while executing the handlers. - Move the setting of clkintr_pending into intr_execute_handlers() and set the variable for any interrupt source with a vector of 0. (Should only be true for IRQ 0.) This fixes clkintr_pending in the NO_MIXED_MODE case. - Implement lapic_eoi() and use it to implement ioapic_eoi_source(). - Rename atpic_sched_ithd() to atpic_handle_intr() since it is used to handle all atpic interrupts and not just threaded ones. Inspired by: peter's changes to amd64 in p4 (1) Requested by: bde (2)
* - Similar to post-PAE RELENG_4 split pmap_pte_quick() into two cases,alc2003-11-081-1/+1
| | | | | | | | | | | pmap_pte() and pmap_pte_quick(). The distinction being based upon the locks that are held by the caller. When the given pmap is not the current pmap, pmap_pte() should be used when Giant is held and pmap_pte_quick() should be used when the vm page queues lock is held. - When assigning to PMAP1 or PMAP2, include PG_A anf PG_M. - Reenable the inlining of pmap_is_current(). In collaboration with: tegge
* Document the lockfunc and lockfuncarg arguments to bus_dma_tag_create() inscottl2003-11-071-0/+4
| | | | the busdma headers.
* Spelling and grammar fixes.anholt2003-11-051-8/+8
| | | | | PR: kern/54658 Submitted by: Roderick van Domburg <r.s.a.vandomburg@student.utwente.nl>
* Remove old APIC header.jhb2003-11-031-447/+0
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* Catch up to interrupt code changes.jhb2003-11-031-0/+2
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* New i386 SMP code:jhb2003-11-032-132/+25
| | | | | | | | | | | | | | | | | | | | | | - The MP code no longer knows anything specific about an MP Table. Instead, the local APIC code adds CPUs via the cpu_add() function when a local APIC is enumerated by an APIC enumerator. - Don't divide the argument to mp_bootaddress() by 1024 just so that we can turn around and mulitply it by 1024 again. - We no longer panic if SMP is enabled but we are booted on a UP machine. - init_secondary(), the asm code between init_secondary() and ap_init() in mpboot.s and ap_init() have all been merged together in C into init_secondary(). - We now use the cpuid feature bits to determine if we should enable PSE, PGE, or VME on each AP. - Due to the change in the implementation of critical sections, acquire the SMP TLB mutex around a slightly larger chunk of code for TLB shootdowns. - Remove some of the debug code from the original SMP implementation that is no longer used or no longer applies to the new APIC code. - Use a temporary hack to disable the ACPI module until the SMP code has been further reorganized to allow ACPI to work as a module again. - Add a DDB command to dump the interesting contents of the IDT.
* Add the MP Table APIC enumerator. This code uses the BIOS MP Table tojhb2003-11-031-2764/+45
| | | | | enumerate I/O APICs as well as local APICs. It also provides Host-PCI and PCI-PCI bridge drivers to use the MP Table to route PCI interrupts.
* New APIC support code:jhb2003-11-034-14/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - The apic interrupt entry points have been rewritten so that each entry point can serve 32 different vectors. When the entry is executed, it uses one of the 32-bit ISR registers to determine which vector in its assigned range was triggered. Thus, the apic code can support 159 different interrupt vectors with only 5 entry points. - We now always to disable the local APIC to work around an errata in certain PPros and then re-enable it again if we decide to use the APICs to route interrupts. - We no longer map IO APICs or local APICs using special page table entries. Instead, we just use pmap_mapdev(). We also no longer export the virtual address of the local APIC as a global symbol to the rest of the system, but only in local_apic.c. To aid this, the APIC ID of each CPU is exported as a per-CPU variable. - Interrupt sources are provided for each intpin on each IO APIC. Currently, each source is given a unique interrupt vector meaning that PCI interrupts are not shared on most machines with an I/O APIC. That mapping for interrupt sources to interrupt vectors is up to the APIC enumerator driver however. - We no longer probe to see if we need to use mixed mode to route IRQ 0, instead we always use mixed mode to route IRQ 0 for now. This can be disabled via the 'NO_MIXED_MODE' kernel option. - The npx(4) driver now always probes to see if a built-in FPU is present since this test can now be performed with the new APIC code. However, an SMP kernel will panic if there is more than one CPU and a built-in FPU is not found. - PCI interrupts are now properly routed when using APICs to route interrupts, so remove the hack to psuedo-route interrupts when the intpin register was read. - The apic.h header was moved to apicreg.h and a new apicvar.h header that declares the APIs used by the new APIC code was added.
* Add a per-thread variable for saving the state of eflags to support thejhb2003-11-031-3/+1
| | | | critical section code.
* New device interrupt code. This defines an interrupt source abstractionjhb2003-11-031-0/+91
| | | | | | | | | | | | | | | | | | that provides methods via a PIC driver to do things like mask a source, unmask a source, enable it when the first interrupt handler is added, etc. The interrupt code provides a table of interrupt sources indexed by IRQ numbers, or vectors. These vectors are what new-bus uses for its IRQ resources and for bus_setup_intr()/bus_teardown_intr(). The interrupt code then maps that vector a given interrupt source object. When an interrupt comes in, the low-level interrupt code looks up the interrupt source for the source that triggered the interrupt and hands it off to this code to execute the appropriate handlers. By having an interrupt source abstraction, this allows us to have different types of interrupt source providers within the shared IRQ address space. For example, IRQ 0 may map to pin 0 of the master 8259A PIC, IRQs 1 through 60 may map to pins on various I/O APICs, and IRQs 120 through 128 may map to MSI interrupts for various PCI devices.
* - Always use 256 IDT entries since it is now a runtime decison as to howjhb2003-11-031-5/+2
| | | | | | many entries we use. - Add a constant IDT_IO_INTS for the first IDT entry used for device interrupts.
* Define IDTVEC() and TRAP() assembly macros so that they can be sharedjhb2003-11-031-0/+11
| | | | with several files.
* Revert the critical section implementation to disable interrupts viajhb2003-11-031-15/+6
| | | | cli/sti now that we support many more than 32 interrupt sources.
* Always export r_gdt and r_idt and give them extern declarations injhb2003-10-302-3/+1
| | | | machine/segments.h.
* A few whitespace and comment tweaks.jhb2003-10-241-6/+3
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* Move pmap_resident_count() from the MD pmap.h to the MI pmap.h.bms2003-10-061-1/+0
| | | | | | | | Add a definition of pmap_wired_count(). Add a definition of vmspace_wired_count(). Reviewed by: truckman Discussed with: peter
* Commit Bosko's patch to clean up the PSE/PG_G initialization to andpeter2003-10-013-9/+12
| | | | | | | | | | | | | | | | | | | | | avoid problems with some Pentium 4 cpus and some older PPro/Pentium2 cpus. There are several problems, some documented in Intel errata. This patch: 1) moves the kernel to the second page in the PSE case. There is an errata that says that you Must Not point a 4MB page at physical address zero on older cpus. We avoided bugs here due to sheer luck. 2) sets up PSE page tables right from the start in locore, rather than trying to switch from 4K to 4M (or 2M) pages part way through the boot sequence at the same time that we're messing with PG_G. For some reason, the pmap work over the last 18 months seems to tickle the problems, and the PAE infrastructure changes disturb the cpu bugs even more. A couple of people have reported a problem with APM bios calls during boot. I'll work with people to get this resolved. Obtained from: bmilekic
* - Add ss2_pagezero() for zeroing pages using the movnti instruction. Thisjeff2003-10-011-0/+1
| | | | | instruction is enabled with SSE2 but does not use SSE registers. It is a "non-temporal" move which bypasses the cache and does not dirty lines.
* - On my Pentium4-M laptop, invalpg takes ~1100 cycles if the page is found injeff2003-09-301-1/+2
| | | | | | | | | | the TLB and ~1600 if it is not. Therefore, it is more effecient to invalidate the TLB after operations that use CMAP rather than before. - So that the tlb is invalidated prior to switching off of a processor, we must change the switchin functions to switchout functions. - Remove td_switchout from the thread and move it to the x86 pcb. - Move the code that calls switchout into swtch.s. These changes make this optimization truely x86 specific.
* - Eliminate the pte object.alc2003-09-251-1/+0
| | | | | - Use kmem_alloc_nofault() rather than kmem_alloc_pageable() to allocate KVA space for the page directory page(s). Submitted by: tegge
* Add sysentvec->sv_fixlimits() hook so that we can catch cases on 64 bitpeter2003-09-251-12/+0
| | | | | | | | | | | | | | | | | | | | | systems where the data/stack/etc limits are too big for a 32 bit process. Move the 5 or so identical instances of ELF_RTLD_ADDR() into imgact_elf.c. Supply an ia32_fixlimits function. Export the clip/default values to sysctl under the compat.ia32 heirarchy. Have mmap(0, ...) respect the current p->p_limits[RLIMIT_DATA].rlim_max value rather than the sysctl tweakable variable. This allows mmap to place mappings at sensible locations when limits have been reduced. Have the imgact_elf.c ld-elf.so.1 placement algorithm use the same method as mmap(0, ...) now does. Note that we cannot remove all references to the sysctl tweakable maxdsiz etc variables because /etc/login.conf specifies a datasize of 'unlimited'. And that causes exec etc to fail since it can no longer find space to mmap things.
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