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path: root/sys/i386/include/apicvar.h
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* Add a handler for the local APIC error interrupt. For now it just printsjhb2010-03-291-2/+3
* Improving the clocks auto-tunning by firstly checking if the atrtc may beattilio2010-03-031-1/+1
* Handling all the three clocks (hardclock, softclock, profclock) with theattilio2010-01-151-1/+7
* Adjust the handling of the local APIC PMC interrupt vector:jhb2009-08-141-0/+3
* * Completely Remove the option STOP_NMI from the kernel. This optionattilio2009-08-131-5/+2
* Decouple the i386 native and i386 Xen APIC definitions a little further.adrian2009-06-071-4/+22
* Fix the MP IPI code to differentiate between bitmapped IPIs and function IPIs.adrian2009-05-311-7/+7
* Add support for using i8254 and rtc timers as event sources for i386 SMPmav2009-05-021-1/+4
* - Allocate apic vectors on a per-cpu basis. This allows us to allocatejeff2009-01-291-7/+10
* Add constants for fields in the local APIC error status register and ajhb2008-12-111-0/+1
* Fix general issues with IPI supportkmacy2008-10-241-7/+7
* Header cleanups and addition of IPI declarations for xenkmacy2008-10-211-0/+12
* Handle CPUs with APIC IDs higher than 32 (at least one IBM server usesjhb2007-05-081-0/+1
* Minor fixes and tweaks to the x86 interrupt code:jhb2007-05-081-0/+1
* Add a new apic0 psuedo-device to claim memory resources for the memoryjhb2007-03-201-0/+2
* Use vm_paddr_t rather than uintptr_t when passing the physical address ofjhb2007-03-051-2/+2
* Evidently FreeBSD has long relied on the compiler to treat structureskmacy2006-12-171-2/+2
* MD support for PCI Message Signalled Interrupts on amd64 and i386:jhb2006-11-131-0/+1
* Change the x86 interrupt code to suspend/resume interrupt controllersjhb2006-10-101-1/+1
* Add a new 'pmap_invalidate_cache()' to flush the CPU caches via thejhb2006-05-011-3/+4
* Rework how we wire up interrupt sources to CPUs:jhb2006-02-281-1/+0
* Tweak how the MD code calls the fooclock() methods some. Instead ofjhb2005-12-221-1/+1
* Change the i386 code to pass the interrupt vector as a separate argumentjhb2005-12-051-1/+1
* Change the x86 code to allocate IDT vectors on-demand when an interruptjhb2005-11-021-2/+3
* Add IPI support for preempting a thread on another CPU.ups2005-06-091-1/+2
* Remove support for mixed mode altogether now that we no longer use IRQ 0jhb2005-04-141-1/+0
* Use the local APIC timer to drive the various kernel clocks on SMP machinesjhb2005-02-081-4/+4
* - Add a function to set the Task Priority Register (TPR) of the local APIC.jhb2004-12-231-10/+14
* Avoid more than two pending IPI interrupt vectors per local APICups2004-12-071-9/+42
* Various cleanups in support of a future ioapic_config_intr() function:jhb2004-06-231-0/+7
* Rework the APIC mixed mode support a bit:jhb2004-05-101-0/+1
* - Change the APIC code to mostly use the recently added intr_triggerjhb2004-05-041-4/+7
* Whitespace nit (sorry, couldn't help it)peter2003-11-141-1/+1
* Shuffle the APIC interrupt vectors around a bit:jhb2003-11-141-11/+13
* Fix a typo.jhb2003-11-131-1/+1
* - Move manipulation of td_intr_nesting_level out of assembly interruptjhb2003-11-121-0/+1
* New APIC support code:jhb2003-11-031-0/+165
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