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* Add terasic_mtl(4), a device driver for the Terasic Multi-Touch LCD,rwatson2012-08-257-0/+1632
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | used with Terasic's DE-4 and other similar FPGA boards. This display is 800x480 and includes a capacitive touch screen, multi-touch gesture recognition, etc. This device driver depends on a Cambridge- provided IP core that allows the MTL device to be hooked up to the Altera Avalon SoC bus, and also provides a VGA-like text frame buffer. Although it is compiled as a single device driver, it actually implements a number of different device nodes exporting various aspects of this multi-function device to userspace: - Simple memory-mapped driver for the MTL 24-bit pixel frame buffer. - Simple memory-mapped driver for the MTL control register set. - Simple memory-mapped driver for the MTL text frame buffer. - syscons attachment for the MTL text frame buffer. This driver attaches directly to Nexus as is common for SoC device drivers, and for the time being is considered BERI-specific, although in principle it might be used with other hard and soft cores on Altera FPGAs. Control registers, including touchscreen input, are simply memory mapped; in the future it would be desirable to hook up a more conventional device node that can stream events, support kqueue(2)/ poll(2)/select(2), etc. This is the first use of syscons on MIPS, as far as I can tell, and there are some loose ends, such as an inability to use the hardware cursor. More fundamentally, it appears that syscons(4) assumes that either a host is PC-like (i386, amd64) *or* it must be using a graphical frame buffer. While the MTL supports a graphical frame buffer, using the text frame buffer is preferable for console use. Fixing this issue in syscons(4) requires non-trivial changes, as the text frame buffer support assumes that direct memory access can be done to the text frame buffer without using bus accessor methods, which is not the case on MIPS. As a workaround for this, we instead double-buffer and pretend to be a graphical frame buffer exposing text accessor methods, leading to some quirks in syscons behaviour. Sponsored by: DARPA, AFRL
* Do not swap byte order if we assign default value for intr_cellsgonzo2012-08-251-1/+2
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* Add isf(4), a driver for the Intel StrataFlash family of NOR flash parts.brooks2012-08-253-0/+954
| | | | | | | | | | | The driver attempts to support all documented parts, but has only been tested with the 512Mbit part on the Terasic DE4 FPGA board. It should be trivial to adapt the driver's attach routine to other embedded boards using with any parts in the family. Also import isfctl(8) which can be used to erase sections of the flash. Sponsored by: DARPA, AFRL
* Add altera_jtag_uart(4), a device driver for Altera's JTAG UART soft core,rwatson2012-08-254-0/+1132
| | | | | | | | | | | | | | | | | | | | | | which presents a UART-like interface over the Avalon bus that can be addressed over JTAG. This IP core proves extremely useful, allowing us to connect trivially to the FreeBSD console over JTAG for FPGA-embedded hard and soft cores. As interrupts are optionally configured for this soft core, we support both interrupt-driven and polled modes of operation, which must be selected using device.hints. UART instances appear in /dev as ttyu0, ttyu1, etc. However, it also contains a number of quirks, which make it difficult to tell when JTAG is connected, and some buffering issues. We work around these as best we can, using various heuristics. While the majority of this device driver is not only not BERI-specific, but also not MIPS-specific, for now add its defines in the BERI files list, as the console-level parts are aware of where the first JTAG UART is mapped on Avalon, and contain MIPS-specific address translation, to use before Newbus and device.hints are available. Sponsored by: DARPA, AFRL
* Add a device driver for the Altera University Program SD Card IP Core,rwatson2012-08-255-0/+1397
| | | | | | | | | | | | | | | | | | | | | | which can be synthesised in Altera FPGAs. An altera_sdcardc device probes during the boot, and /dev/altera_sdcard devices come and go as inserted and removed. The device driver attaches directly to the Nexus, as is common for system-on-chip device drivers. This IP core suffers a number of significant limitations, including a lack of interrupt-driven I/O -- we must implement timer-driven polling, only CSD 0 cards (up to 2G) are supported, there are serious memory access issues that require the driver to verify writes to memory-mapped buffers, undocumented alignment requirements, and erroneous error returns. The driver must therefore work quite hard, despite a fairly simple hardware-software interface. The IP core also supports at most one outstanding I/O at a time, so is not a speed demon. However, with the above workarounds, and subject to performance problems, it works quite reliably in practice, and we can use it for read-write mounts of root file systems, etc. Sponsored by: DARPA, AFRL
* Add altera_avgen(4), a generic device driver to be used by hard and softrwatson2012-08-252-0/+534
| | | | | | | | | | | | | | | | | | | | CPU cores on Altera FPGAs. The device driver allows memory-mapped devices on Altera's Avalon SoC bus to be exported to userspace via device nodes. device.hints directories dictate device name, permissible access methods, physical address and length, and I/O alignment. Devices can be accessed using read(2)/write(2), but also memory mapped in userspace using mmap(2). Devices attach directly to the Nexus, as is common for embedded device drivers; in the future something more mature might be desirable. There is currently no facility to support directing device-originated interrupts to userspace. In the future, this device driver may be renamed to socgen(4), as it can in principle also be used with other system-on-chip (SoC) busses, such as Axi on ASICs and FPGAs. However, we have only tested it on Avalon busses with memory-mapped ROMs, frame buffers, etc. Sponsored by: DARPA, AFRL
* Provide basic glue to allow syscons to be used on MIPS, modelledrwatson2012-08-254-3/+26
| | | | | | | | | on PowerPC support. This was clearly not something syscons was designed to do (very specific assumptions about the nature of VGA consoles on PCs), but fortunately others have long since blazed the way on making it work regardless of that. Sponsored by: DARPA, AFRL
* In the gxemul console, check the RB_SERIAL boot flag, and change therwatson2012-08-251-1/+2
| | | | | | | | relative priority of the gxemul console in line with its role as a "seiral console". This allows it to override video console drivers that might otherwise take precdence, subject to that boot flag. Sponsored by: DARPA, AFRL
* Rename the gxemul console device to "ttyu0" to match the expectations ofrwatson2012-08-251-2/+2
| | | | | | the default MIPS /etc/ttys. Sponsored by: DARPA, AFRL
* Clear freeze bit before calling xpt_release_devq.jimharris2012-08-241-1/+1
| | | | | | | | This ensures that any ccbs which immediately start during the call to xpt_release_devq see an accurate picture of the frozen_lun_mask. Sponsored by: Intel MFC after: 3 days
* Remove the hard-coded AR5416-series parameters and instead use theadrian2012-08-241-38/+13
| | | | | | | | | | | | | | | | | | | | | DFS parameters fetched from the HAL. Check whether the specific chipset supports RADAR reporting before enabling DFS; or some of the (unset) DFS methods may fail. Tested: * AR5210 (correctly didn't enable radar PHY reporting) * AR5212 (correctly enabled radar PHY reporting w/ the correct default parameters.) TODO: * Now that I have this capability check in place, I could remove the (empty) DFS methods from AR5210/AR5211. * Test on AR5416, AR9160, AR9280. PR: kern/170904
* Correctly handle the "pe_enabled" flag - both when configuring DFS andadrian2012-08-241-1/+7
| | | | | | fetching the current DFS configuration. PR: kern/170904
* Add an accessor macro for getting access to the default DFS parameters.adrian2012-08-241-0/+2
| | | | PR: kern/170904
* Add default values for the NumTxMaps capability.adrian2012-08-244-0/+4
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* Add the method to fetch the default DFS parameters for the AR5212 PHY.adrian2012-08-243-1/+33
| | | | | | I need to check whether new parameters were added for the AR5413 NIC. PR: kern/170904
* Implement an API to fetch the default DFS parameters for the given chip.adrian2012-08-244-0/+50
| | | | | | | The only chip this is currently implemented for is the AR5416 HAL family. A follow-up commit will add AR5212 support. PR: kern/170904
* Bring over some new EEPROM regulatory domain flags.adrian2012-08-241-0/+28
| | | | Obtained from: Qualcomm Atheros
* Oops, another copy/paste issue.adrian2012-08-241-1/+1
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* Add ath_hal_get_curmode() - this is used by the Osprey HAL.adrian2012-08-242-0/+50
| | | | Obtained from: Qualcomm Atheros
* Add rfkill HAL accessor methods.adrian2012-08-241-0/+7
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* Oops, fix copy/paste silliness.adrian2012-08-241-5/+5
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* Add some more capabilities (unused at the present.)adrian2012-08-241-0/+16
| | | | Obtained from: Qualcomm Atheros
* Add the MFP capability to ath_hal_getcapability().adrian2012-08-241-1/+3
| | | | Obtained from: Qualcomm Atheros
* Add some more diagnostic codes.adrian2012-08-241-0/+4
| | | | Obtained from: Qualcomm Atheros
* Wrap this a little so it's slightly easier on the eyes.adrian2012-08-241-1/+2
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* Add some new flags:adrian2012-08-241-2/+11
| | | | | | | | | | * mfp support; * 4.9ghz support in the HAL; * device type - specifically, the bus type and whether it's a HB63 NIC (which requires some subtle chainmask handling differences in the AR5416 HAL.) Obtained from: Qualcomm Atheros
* Fetch the chip select in the bridge driver, like all the other spiimp2012-08-232-4/+0
| | | | bridges do.
* Add tunable for XHCI port routing.hselasky2012-08-233-5/+19
| | | | MFC after: 1 week
* The check for MAXPHYS doesn't make sense, so remove it.imp2012-08-231-7/+24
| | | | | | Report errors indicated by the transport. If this is too chatty, I'll throw it behind a debug write. Remove commented out debugs that are no longer useful.
* Add a placeholder and typedefs for MFP (management frame protection.)adrian2012-08-231-0/+20
| | | | Obtained from: Qualcomm Atheros
* Add some more interrupt handling bits.adrian2012-08-231-1/+7
| | | | Obtained from: Qualcomm Atheros
* Add AR9380 devid HAL definitions and probe/attach strings.adrian2012-08-232-0/+93
| | | | Obtained from: Device IDs are from Qualcomm Atheros
* Add chipset names.adrian2012-08-231-2/+2
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* Add new USB device ID.hselasky2012-08-222-0/+2
| | | | | Submitted by: Dmitry Luhtionov MFC after: 1 week
* Fix/add support for SCSI UNMAP to ATA DSM translation.jimharris2012-08-216-11/+56
| | | | | | | | | | | | | | | | | | This addresses kernel panic observed when sending SCSI UNMAP commands to SATA disks attached to isci(4). 1) Flesh out callback routines to allocate/free buffers needed for translating SCSI UNMAP data to ATA DSM data. 2) Add controller-level pool for storing buffers previously allocated for UNMAP translation, to lessen chance of no buffer available under memory pressure. 3) Ensure driver properly handles case where buffer pool is empty and contigmalloc returns NULL. Sponsored by: Intel Reported by: Maksim Yevmenkin <max at netflix dot com> Discussed with: scottl MFC after: 3 days
* Deal with the case where a syncache entry added by the TOE driver isnp2012-08-214-0/+33
| | | | | | evicted from the syncache but a later syncache_expand succeeds because of syncookies. The TOE driver has to resort to more direct means to install its hooks in the socket in this case.
* Style.hselasky2012-08-211-1/+1
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* Fix USB drivers for KB920X target.hselasky2012-08-212-6/+26
| | | | | Add missing clock settings. VBUS GPIO IRQ is still missing (TODO).
* Avoid a NULL pointer dereference.np2012-08-211-2/+2
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* Cannot hold a mutex around vm_fault_quick_hold_pages, so don't. Tweaknp2012-08-211-12/+22
| | | | some comments while here.
* Minor cleanup: use bitwise ops instead of pointless wrappers aroundnp2012-08-216-125/+81
| | | | setbit/clrbit.
* Correctly handle the case where an inp has already been dropped by the timenp2012-08-212-25/+18
| | | | | | the TOE driver reports that an active open failed. toe_connect_failed is supposed to handle this but it should be provided the inpcb instead of the tcpcb which may no longer be around.
* Add s35390a_rtc(4) driver for Seiko Instruments S-35390A RTC.hrs2012-08-211-0/+333
| | | | Submitted by: Yusuke Tanaka
* Initialise an uninitialised variable.adrian2012-08-211-1/+1
| | | | | | GCC on -9 didn't pick this up; clang did. Submitted by: David Wolfskill
* Remove dependence on MAXPHYS.mjacob2012-08-213-6/+8
| | | | MFC after: 1 month
* Fix a build issue when ATH_DEBUG isn't defined - just initialise and useadrian2012-08-201-2/+4
| | | | qnum.
* Wrap debugging in #ifdef ATH_DEBUGadrian2012-08-201-0/+2
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* Flesh out some initial EDMA TX FIFO fill, complete and refill routines.adrian2012-08-201-6/+195
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Note: This is totally sub-optimal and a work in progress. * Support filling an empty FIFO TXQ with frames from the ath_buf queue in the ath_txq list. However, since there's (currently) no clean, easy way to separate the frames that are in the FIFO versus just waiting, the code waits for the FIFO to be totally empty before it attempts to queue more. This is highly sub-optimal but is enough to get the ball rolling. * A _lot_ of the code assumes that the TX status is filled out in the struct ath_buf bf_status field. So for now, memcpy() the completion over. * None of the TX drain / reset routines will attempt to complete completed frames before draining, so it can't be used for 802.11n TX aggregation. (This won't work anyway, as the aggregation TX descriptor API hasn't yet been converted; and that'll happen in some future commits.) * Fix an issue where the FIFO counter wasn't being incremented, leading to the queue logic just plain not working. * HAL_EIO means "descriptor wasn't valid", versus "not finished, don't continue." So don't stop processing descriptors when HAL_EIO is hit. * Don't service frame completion from the beacon queue. It isn't currently fully setup like a real queue and the first attempt at accessing the queue lock will panic the kernel. Tested: * AR9380, STA mode This commit is brought to you by said AR9380 in STA mode.
* Advance the descriptor pointer by sc->sc_tx_desclen bytes, rather thanadrian2012-08-201-12/+11
| | | | | | | | | | | | | | sizeof(struct ath_desc). This isn't correct for EDMA TX descriptors. This popped up during iperf tests. Ping tests never created frames that had enough segments to overflow into a second descriptor. However, an iperf TCP test would do that after a few seconds; the second descriptor would almost always certainly have garbage. Tested: * AR9380, STA mode * AR9280, STA mode (802.11n TX, legacy TX)
* Make sure all of the buffers are printed, rather than (n-1).adrian2012-08-201-4/+2
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