| Commit message (Collapse) | Author | Age | Files | Lines |
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similar to the 82576 controller.
Tested with Intel i340 cards.
Reviewed by: erj@
MFC after: 1 week
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MacBookPro11,4 and MacBook12,1. This update adds support for the
force touch parameter.
PR: 204420
MFC after: 1 week
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the TOE for LAN operation. It is possible to set this to other values
(cluster for networks with little loss and really tight RTTs, and wan
for relatively large RTTs and/or lossy networks) depending on the
environment in which the TOE is being used.
None of this affects plain NIC operation in any way.
MFC after: 1 week
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Add some missing bits from D4020.
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Tested with RTL8188EU, HOSTAP and STA modes
Reviewed by: kevlo
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D4034
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- Split urtwn_tx_start() into urtwn_tx_data() and urtwn_tx_start()
(the last will be used for beacon updates / raw xmit path).
- Remove unneeded code from _urtwn_getbuf().
- Use CCK11 for data frames in 11b mode.
- Send EAPOL frames at 1 Mbps.
- Reduce code duplication in urtwn_tx_data().
- Fix sequence numbering.
- Add IEEE80211_RADIOTAP_F_WEP flag for encrypted frames.
- Check URTWN_RUNNING flag under lock.
Tested with RTL8188EU, STA mode.
Reviewed by: kevlo
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D4017
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Approved by: adrian
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Right now the only way to force a cold reset is:
* The HAL itself detects it's needed, or
* The sysctl, setting all resets to be cold.
Trouble is, cold resets take quite a bit longer than warm resets.
However, there are situations where a cold reset would be nice.
Specifically, after a stuck beacon, BB/MAC hang, stuck calibration results,
etc.
The vendor HAL has a separate method to set the reset reason (which is
how HAL_RESET_BBPANIC gets set) which informs the HAL during the reset path
why it occured. This is almost but not quite the same; I may eventually
unify both approaches in the future.
This commit just extends HAL_RESET_TYPE to include both status (eg BBPANIC)
and type (eg do COLD.) None of the HAL code uses it yet though; that'll
come later.
It also is a big no-op in each HAL - I need to go teach each of the HALs
about cold/warm reset through this path.
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Using unmapped IO is really beneficial when running inside of a VM,
since it avoids IPIs to other vCPUs in order to invalidate the
mappings.
This patch adds unmapped IO support to blkfront. The following tests
results have been obtained when running on a Xen host without HAP:
PVHVM
3165.84 real 6354.17 user 4483.32 sys
PVHVM with unmapped IO
2099.46 real 4624.52 user 2967.38 sys
This is because when running using shadow page tables TLB flushes and
range invalidations are much more expensive, so using unmapped IO
provides a very important performance boost.
Sponsored by: Citrix Systems R&D
MFC after: 2 weeks
X-MFC-with: r290610
dev/xen/blkfront/blkfront.c:
- Add and announce support for unmapped IO.
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before their initial configuration is done, it turns out that r281337
has the inverse effect on some older chips. Moreover, as with newer
chips before, two chips seemingly identical according to their MAC
revisions may behave differently in this regard, with most working
but a few not, making changes extremely hard to test.
Closer inspection of the corresponding Linux code suggests that RX
and TX should only be enabled after their initial configuration with
RTL8168G and later chips, i. e. RTL8106E{,US}, RTL8107E, as well as
RTL8168{EP,G,GU,H}, so limit the new code path to these. [1]
- Distinguish between RTL8168H and RTL8107E, with the latter being the
10/100-Mbit/s-only variant of the former.
- For MAC variants that can only do Fast Ethernet at a maximum, ensure
that we don't advertise Gigabit Ethernet speed.
- In re_stop(), do the inverse of re_init_locked() and enable RXDV
gate on RTL8168G and later chips again, matching what Linux does.
PR: 203422 [1]
MFC after: 1 week
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- Filter out unneeded frames in STA mode.
- Implement ic_promisc() call.
Tested with RTL8188EU, STA and MONITOR modes.
Reviewed by: kevlo
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D3999
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learned that the Power8 and the PS3 have a mix of OFW and FDT. Both have AIM
defined. But currently they are not affected. They have no I2C devices under
OFW.
This version was tested on a Quad G5 and build tested for armv6*.
Discussed with nwhitehorn@
Reviewed by: ian@
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There is no functional change. The goal is to ease the future update to
Linux 3.8's i915 driver.
MFC after: 2 months
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32-bits aligned. Merge the two bounce buffers into a single one. Some
rough tests showed that the DWC OTG throughput on RPI2 increased by
10% after this patch.
MFC after: 1 week
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Sponsored by: EMC / Isilon Storage Division
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While there, simplify the wait logic.
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aligned to reduce the use of bounce buffers in PIO mode.
MFC after: 1 week
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It's no longer "outdoor."
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can find the network phy.
Sponsored by: ABT Systems Ltd
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The mbuf length fields must be set before m_adj() is called else
m_adj() will not always adjust the mbuf and an unaligned read
exception can trigger inside the network stack. This can happen on
platforms where unaligned reads are not supported. Adjust a length
check to include the 2-byte ethernet alignment while at it.
MFC after: 3 days
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- Drop TSF initialization; device can discover it without our help.
- Do not touch R92C_BCN_CTRL_EN_BCN bit in STA mode.
- Add 'static' keyword for function definition.
Tested with RTL8188EU, STA mode.
Reviewed by: kevlo
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D3801
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Obtained from: Linux carl9170
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- Fix mbuf leaks in iwn_raw_xmit() and iwn_xmit_task()
(regression since r288178).
- Check IWN_FLAG_RUNNING flag under lock.
- Remove m->m_pkthdr.rcvif initialization (fixed in r283994).
- Enclose some values in return statements into parentheses.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D4069
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attributes when replying to a TLP from a Root Port. As a workaround,
disable No Snoop and Relaxed Ordering in the Root Port of each T5 adapter
during attach so that CPU-initiated requests do not contain these flags.
Note that this affects CPU-initiated requests to all devices under this
root port.
Reviewed by: np
MFC after: 1 week
Sponsored by: Chelsio
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PCI-express root port of a given PCI device.
Reviewed by: kib, imp
MFC after: 1 week
Sponsored by: Chelsio
Differential Revision: https://reviews.freebsd.org/D4089
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PCI-Express capability registers (that is, PCI config registers in the
standard PCI config space belonging to the PCI-Express capability
register set).
Note that all of the current PCI-e registers are either 16 or 32-bits,
so only widths of 2 or 4 bytes are supported.
Reviewed by: imp
MFC after: 1 week
Sponsored by: Chelsio
Differential Revision: https://reviews.freebsd.org/D4088
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Since r288350, ic_wme_task() is called via ieee80211_runtask(),
so, any additional deferring from the driver side is not needed.
Approved by: adrian (mentor)
Differential Revision: https://reviews.freebsd.org/D4072
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Submitted by: Wei Liu <wei.liu2@citrix.com>
Reviewed by: royger
Sponsored by: Citrix Systems R&D
Differential Revision: https://reviews.freebsd.org/D4079
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This is submitted by a FreeBSD wifi user who has requested they not
be named. Thankyou!
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MFC after: 1 week
Sponsored by: EMC / Isilon Storage Division
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usage. The comment in the code should explain the situation.
Discussed with: ian@
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to transmit the buffer.
ath_tx_start() may manipulate/reallocate the mbuf as part of the DMA
code, so we can't expect the mbuf can be returned back to the caller.
Now, the net80211 ifnet work changed the semantics slightly so
if an error is returned here, the mbuf/reference is freed by the
caller (here, it's net80211.)
So, once we reach ath_tx_start(), we never return failure. If we fail
then we still return OK and we free the mbuf/noderef ourselves, and
we increment OERRORS.
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MFC after: 1 week
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allocation of DMA bounce buffers.
Discussed with: ian @
MFC after: 3 weeks
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There is no functional change. The goal is to ease the future update to
Linux 3.8's i915 driver.
MFC after: 2 months
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Certain invalid operations trigger hardware error conditions. Error
conditions that only halt one channel can be detected and recovered by
resetting the channel. Error conditions that halt the whole device are
generally not recoverable.
Add a sysctl to inject channel-fatal HW errors,
'dev.ioat.<N>.force_hw_error=1'.
When a halt due to a channel error is detected, ioat(4) blocks new
operations from being queued on the channel, completes any outstanding
operations with an error status, and resets the channel before allowing
new operations to be queued again.
Update ioat.4 to document error recovery; document blockfill introduced
in r290021 while we are here; document ioat_put_dmaengine() added in
r289907; document DMA_NO_WAIT added in r289982.
Sponsored by: EMC / Isilon Storage Division
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There is no functional change. The goal is to ease the future update to
Linux 3.8's i915 driver.
MFC after: 2 months
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ifmedia_ioctl() returns EINVAL
Differential Revision: 3897
Submitted by: aronen@juniper.net
Reviewed by: marcel
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MFC after: 3 days
Sponsored by: Intel
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Fixes race condition observed under following circumstances:
1) I/O split on 128KB boundary with Intel NVMe controller.
Current Intel controllers produce better latency when
I/Os do not span a 128KB boundary - even if the I/O size
itself is less than 128KB.
2) Per-CPU I/O queues are enabled.
3) Child I/Os are submitted on different submission queues.
4) Interrupts for child I/O completions occur almost
simultaneously.
5) ithread for child I/O A increments bio_inbed, then
immediately is preempted (rendezvous IPI, higher priority
interrupt).
6) ithread for child I/O B increments bio_inbed, then completes
parent bio since all children are now completed.
7) parent bio is freed, and immediately reallocated for a VFS
or gpart bio (including setting bio_children to 1 and
clearing bio_driver1).
8) ithread for child I/O A resumes processing. bio_children
for what it thinks is the parent bio is set to 1, so it
thinks it needs to complete the parent bio.
Result is either calling a NULL callback function, or double freeing
the bio to its uma zone.
PR: 203746
Reported by: Drew Gallatin <gallatin@netflix.com>,
Marc Goroff <mgoroff@quorum.net>
Tested by: Drew Gallatin <gallatin@netflix.com>
MFC after: 3 days
Sponsored by: Intel
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status registers for every interrupt. Check a common host channel
status interrupt register first, then conditionally read the
individual host channel status registers.
Submitted by: Sebastian Huber <sebastian.huber@embedded-brains.de>
MFC after: 1 week
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payload to transmit.
MFC after: 1 week
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MFC after: 2 weeks
Sponsored by: EMC / Isilon Storage Division
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Nagged by: vangyzen
Sponsored by: EMC / Isilon Storage Division
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