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* MFC: r294362, r294414, r294753marius2016-01-271-7/+30
| | | | | | | | | | | | - Fix tty_drain() and, thus, TIOCDRAIN of the current tty(4) incarnation to actually wait until the TX FIFOs of UARTs have be drained before returning. This is done by bringing the equivalent of the TS_BUSY flag found in the previous implementation back in an ABI-preserving way. Reported and tested by: Patrick Powell - Make the code consistent with itself style-wise and bring it closer to style(9). - Mark unused arguments as such. - Make the ttystates table const.
* MFC r293781:ian2016-01-174-67/+201
| | | | | | | | | Restore uart PPS signal capture polarity to its historical norm, and add an option to invert the polarity in software. Also add an option to capture very narrow pulses by using the hardware's MSR delta-bit capability of latching line state changes. Relnotes: yes
* MFC r287747: Add ID for Intel Panther Point KT Controllermav2015-09-271-0/+1
| | | | | | Found on ASUS P8Q77-M motherboard. Submitted by: Dmitry Luhtionov <dmitryluhtionov@gmail.com>
* MFC r286469, r286591, r286595, r286596, r286613:ian2015-08-233-19/+134
| | | | | | | | | | | | | | | | | Provide the tty-layer mutex when initializing the pps api. This allows time_pps_fetch() to be used in blocking mode. Allow the choice of PPS signal captured by uart(4) to be runtime-configured, eliminating the need to build a custom kernel to use the CTS signal. Correct the polarity of the PPS assert and clear events with respect to the electrical signals on the serial port. Document the change in polarity of the uart(4) PPS capture. Style fix -- do the braces for switches correctly. Relnotes: yes
* MFC: r285843marius2015-07-302-9/+16
| | | | | | | | | | | | | | | | | | | - Since r253161, uart_intr() abuses FILTER_SCHEDULE_THREAD for signaling uart_bus_attach() during its test that 20 iterations weren't sufficient for clearing all pending interrupts, assuming this means that hardware is broken and doesn't deassert interrupts. However, under pressure, 20 iterations also can be insufficient for clearing all pending interrupts, leading to a panic as intr_event_handle() tries to schedule an interrupt handler not registered. Solve this by introducing a flag that is set in test mode and otherwise restores pre-r253161 behavior of uart_intr(). The approach of additionally registering uart_intr() as handler as suggested in PR 194979 is not taken as that in turn would abuse special pccard and pccbb handling code of intr_event_handle(). [1] - Const'ify uart_driver_name. - Fix some minor style bugs. PR: 194979 [1] Reviewed by: marcel (earlier version)
* MFC r281073, r281074, r281077, r281200:ian2015-05-243-51/+13
| | | | | | | | | | | | | | Use OF_getencprop over OF_getprop and fdt32_to_cpu. The latter may give us the wrong data in the failure case if shift was not zero. Remove the extra copy of uart_fdt_get_clock and uart_fdt_get_shift. While here also use OF_getencprop in uart_fdt_get_clock. Move uart_fdt_get_clock and uart_fdt_get_shift to uart_bus_fdt.c, we may not build uart_cpu_fdt.c in all configs. Fix uart_fdt_get_clock. It should have been using the cell variable passed in, not value on the stack.
* MFC r279723, r279724:ian2015-05-2311-69/+181
| | | | | | | | | Define new linker set, UART_FDT_CLASS_AND_DEVICE, for registering full (class and device) FDT UART. Define second one, UART_FDT_CLASS, for UART class only. Move the uart_class definitions and fdt compat data into the individual uart implementations, and export them using the new linker-set mechanism.
* MFC r279239:ian2015-05-231-10/+25
| | | | | Enable 'receive timeout' interrupt allowing us to not loose 'rx buffer full' event.
* MFC r277132: Rename Exynos UART driver functions. No functional change.ian2015-05-232-1/+2
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* MFC r272399, r272602, r274451, r274452:ian2015-05-235-1/+803
| | | | | | | | | | | Add uart driver for Qualcomm MSM 7000/8000 series chips. It is working on IFC6410 board which has Qualcomm Snapdragon SoC. Use documented compat string for msm uart. Make PL011 UART to wait on putc only when TX FIFO is full Make uart_bus_fdt a decendant of ofwbus
* MFC 278292:jhb2015-03-121-0/+1
| | | | Add the device ID for the AMT serial port on my Thinkpad T400.
* MFC: r266744, r267712, r276351, r277043marius2015-02-081-0/+5
| | | | | | | | - Add PCI ID for AMT based serial interface found on the Lenovo T61. - add support for MosChip MCS9922... This is found on an ExpressCard.. [1] - Add PCI ID for the Oxford Semiconductor OXPCIe952 device. PR: 186891 [1]
* MFC r275101:mav2014-12-031-0/+1
| | | | Add bunch of PCI IDs of Intel Wildcat Point (9 Series) chipsets.
* MFC r272334, r273004:ian2014-10-261-33/+115
| | | | | | | | Return the actual baud rate programmed in the hardware rather than 115200. This allows the "3wire" entry in /etc/ttys (with no speed specified) to work. Use the FIFOs in the imx5/imx6 uart hardware instead of interrupting on each byte sent or received.
* MFC: r257808marius2014-05-191-0/+1
| | | | Add new AMT serial port PCI ID on Intel Lynx Point chipset
* MFC 264981, 264983, 264985:ian2014-05-172-2/+74
| | | | | | | | | | The freescale imx uart driver works for the whole i.MX family, so rename the header file to not have "5xx" in the name. Flesh out imx_uart_init() so that we're not relying on u-boot to init the hardware (meaning uarts other than the console will work). Reword a comment block a bit.
* MFC 264203, 264204, 264206, 264218:ian2014-05-171-1/+1
| | | | | | | | Tell VM we now have ARM platforms with physically discontiguous memory. Define the full 1024M of ram on the imx51 and imx53 boards. Use a more professional uart device description.
* MFC 257774, 256760, 262916, 262905, 262918, 262919, 262920, 262921, 262924,ian2014-05-171-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 262925, 262929, 262932, 262935, 262940, 262941, 262942, 262948, 262949, 262950 Strip arm/conf/DEFAULTS down to just items that are mandatory for running the architecture. Move all the files named foo/common.c to foo/foo_common.c Initial cut for DTS on the hl201 board. Add commented out dts for sam9260ek as well as early printf support. Make clock optional on uart nodes, then back it out ("I don't know what I was thinking, but it is lame.") Set the baud rate if it isn't 0 Make at91_soc_id() public. Properly round at91 resource on unmapping. Move AT91 AIC related stuff to own file. Fix another bug in multicast filtering. i.MX uses 6 bits from MSB in LE CRC32 for the hash value, not the lowest 6 bits in BE CRC32. Follow r262916 with one more config file that references a renamed common.c Remove bogus AT91 define that causes compile errors. Most of the defines for SAM9X are going away soonish anyway (once FDT works), but until then... Remove all dregs of a per-thread undefined-exception-mode stack. Rework the VFP code that handles demand-based save and restore of state. Always call vfp_discard() on thread death. When a thread begins life it doesn't own the VFP hardware state on any cpu. Make undefined exception entry MP-safe.
* MFC r261410ian2014-05-151-0/+3
| | | | | Follow r261352 by updating all drivers which are children of simplebus to check the status property in their probe routines.
* MFC r261083, r261092, r261126, r261127, r261128, r261129, r261130, r261131ian2014-05-143-1/+5
| | | | | | | | | | | | | | Add Atmel serial drivers. uart clock-frequency is a FreeBSD-specific extention. Make it optional and allow the client uart drivers to decide if a frequency is required. Remove redundant declaration for uart devclass. Commit some unrelated, but harmless, FDT ifdefs. Add at91 NAND support, Fix comment. Remove obsolete options and fix comments
* MFC r256839, r256948, r256950, r257299, r257414, r258057, r259090ian2014-05-142-0/+2
| | | | | | | | | | | | | | | Add configuration for the Freescale i.MX53 Quick Start Board. Add the Raspberry Pi BSC (I2C compliant) controller driver. Add Radxa Rock board (by radxa.com) support. Digi-CCWMX53: enable ffec and uart, USB. Add support for Freescale Vybrid Family VF600 Move and rename dwc otg driver to more generic one as it appears to work for rk3188 SoC based board too.
* MFC r257738, r259202, r258410, r260288, r260292, r260294, r260320, r260323,ian2014-05-142-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r260326, r260327, r260331, r260333, r260340, r260371, r260372, r260373, r260374, r260375 Add common bus_space tag definition shared for most supported ARMv6/v7 SoCs. Correct license statements to reflect the fact that these files were all derived from sys/arm/mv/bus_space.c. In pmap_unmapdev(), remember the size, and use that as an argument to kva_free(), or we'd end up always passing it a size of 0 In pmap_mapdev(), first check whether a static mapping exists, Convert TI static device mapping to use the new arm_devmap_add_entry(), Use the common armv6 fdt_bus_tag defintion for tegra instead of a local copy. Eliminate use of fdt_immr_addr(), it's not needed for tegra Convert lpc from using fdt_immr style to arm_devmap_add_entry() to make static device mappings. Retire machine/fdt.h as a header used by MI code, as its function is now obsolete. This involves the following pieces: - Remove it entirely on PowerPC, where it is not used by MD code either - Remove all references to machine/fdt.h in non-architecture-specific code (aside from uart_cpu_fdt.c, shared by ARM and MIPS, and so is somewhat non-arch-specific). - Fix code relying on header pollution from machine/fdt.h includes - Legacy fdtbus.c (still used on x86 FDT systems) now passes resource requests to its parent (nexus). This allows x86 FDT devices to allocate both memory and IO requests and removes the last notionally MI use of fdtbus_bs_tag. - On those architectures that retain a machine/fdt.h, unused bits like FDT_MAP_IRQ and FDT_INTR_MAX have been removed. Add #include <machine/fdt.h> to a few files that used to get it via pollution Enable the mv cesa security/crypto device by providing the required property in the dts source, and adding the right devices to the kernel config. Remove dev/fdt/fdt_pci.c, which was code specific to Marvell ARM SoCs, related to setting up static device mappings. Since it was only used by arm/mv/mv_pci.c, it's now just static functions within that file, plus one public function that gets called only from arm/mv/mv_machdep.c. Switch RPi to using arm_devmap_add_entry() to set up static device mapping. Allow 'no static device mappings' to potentially work. Don't try to find a static mapping before calling pmap_mapdev(), that logic is now part of pmap_mapdev() and doesn't need to be duplicated here. Switch a10 to using arm_devmap_add_entry() to set up static device mapping.
* MFC r257170, r257171, r257172, r257240, r257278, r257279, r257280, r257281,ian2014-05-141-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | r257282, r257332 Wait for DesignWare UART transfers completion before accessing line control Enable UART busy detection handling for Armada XP - based board Enable SATA interface on Armada XP Run mvs SATA driver on Armada XP instead of old mv_sata Retire arm_remap_nocache() and the data and constants associated with it. Remove hard-coded mappings related to Armada XP support Fix-up DTB for Armada XP registers' base according to the actual settings Change Armada XP kernel load address to the u-boot's end address Remove not working and deprecated PJ4Bv6 support Switch off explicit broadcasting of the TLB flush operations for PJ4B CPU Add missing ARMv6 CPU functions to ARM Makefile
* MFC r258800, r258802, r258805, r258806, r258807, r258851, r258857,ian2014-05-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r259199, r259484, r259513, r259514, r259516 The kernel stack guard pages are only below the stack pointer, not above. Remove unnecessary double-setting of the thread's onfault state in copyinstr(). Open Firmware mandates that certain cross-references, in particular those in /chosen, be ihandles. The ePAPR spec makes those cross-reference phandles, since FDT has no concept of ihandles. Have the OF FDT CI module interpret queries about ihandles as cross-reference phandles. Real OF systems have an ihandle under /chosen/stdout, not a phandle. Use the right type. Rearchitect platform memory map parsing to make it less Open Firmware-centric. Remove fdtbus_bs_tag definition, which is now obsolete. The remainder of this file is also slated for future demolition. Return the correct IEEE 1275 code for "nextprop". Use the common Open Firmware PCI interrupt routing code instead of the duplicate version in dev/fdt. Configure interrupt sense based on device tree information. Simplify the ofw_bus_lookup_imap() API slightly: make it allocate maskbuf internally instead of requiring the caller to allocate it.
* MFC r258259, r258798, r259010ian2014-05-141-20/+77
| | | | | | | | | Unify handling of illegal instruction faults between AIM and Book-E. Make uart_cpu_powerpc work on both FDT and OFW systems. Fix debug printfs in FPU_EMU to compile on powerpc64 and enable it for powerpc64.
* MFC r257180, r257195, r257196, r257198, r257209, r257295ian2014-05-141-6/+11
| | | | | | | | | | | | Add some extra sanity checking and checks to printf format specifiers. Try even harder to find a console before giving up. Make devices with registers into the KVA region work reliably. Turn on VM_KMEM_SIZE_SCALE on 32-bit as well as 64-bit PowerPC. Return NOKEY instead of 0 if there are no more key presses queued.
* MFC r257111, r257144, r257157, r257183ian2014-05-131-11/+33
| | | | | | | | | | Test UARTs physical address instead of virtual. Be a bit more flexible in how we find the console from the properties on /chosen, following the list of allowed console properties in ePAPR. Also do not require that stdin be defined and equal to stdout: stdin is nonstandard (for ePAPR) and console in an unexpected place is after all better than no console.
* MFC: r264257, r264327, r264514marius2014-04-221-0/+2
| | | | | | | | | | Distinguish between the different variants and configurations of Sunix {MIO,SER}5xxxx chips instead of treating all of them as PUC_PORT_2S. Among others, this fixes the hang seen when trying to probe the none- existent second UART on an actually 1-port chip. Obtained from: NetBSD (BAR layouts) Sponsored by: Bally Wulff Games & Entertainment GmbH
* MFC: r260889, r260890, r260911:imp2014-03-0111-37/+267
| | | | | | | | | | | | | | | | | r260911 | imp | 2014-01-20 10:45:36 -0700 (Mon, 20 Jan 2014) | 5 lines Don't lock in the generic grab just to lock again in the specific grabs. r260890 | imp | 2014-01-19 12:39:13 -0700 (Sun, 19 Jan 2014) | 11 lines Introduce grab and ungrab upcalls. When the kernel desires to grab the console, it calls the grab functions. These functions should turn off the RX interrupts, and any others that interfere. This makes mountroot prompt work again. If there's more generalized need other than prompting, many of these routines should be expanded to do those new things. Reviewed by: bde (with reservations)
* MFC r259838:marcel2014-02-161-0/+1
| | | | Add another HP iLO serial (console) port, found on Itanium servers.
* MFC r259685:imp2013-12-232-0/+27
| | | | | | | | | | | | | | | | | | Plumb the cn_grab and cn_ungrab routines down into the uart clients. Mask RX interrupts while grabbed on the atmel serial driver. This UART interrupts every character. When interrupts are enabled at the mountroot> prompt, this means the ISR eats the characters. Rather than try to create a cooperative buffering system for the low level kernel console, instead just mask out the ISR. For NS8250 and decsendents this isn't needed, since interrupts only happen after 14 or more characters (depending on the fifo settings). Plumb such that these are optional so there's no change in behavior for all the other UART clients. ddb worked on this platform because all interrupts were disabled while it was running, so this problem wasn't noticed. The mountroot> issue has been around for a very very long time. Approved by: re@ (gjb@)
* MFC r257556:ian2013-12-133-16/+20
| | | | | Arrange for uart_cpu_fdt's probe() routine to use the same table of compat strings as uart_bus_fdt's probe().
* MFC r257480:ian2013-12-131-15/+30
| | | | | | Convert the if/else list of compatible devices to the table-driven ofw_bus_search_compatible() routine. In addition to converting existing strings to table entries, also add compat strings for the whole imx family.
* MFC r256815:ian2013-12-131-5/+5
| | | | Calculate the baud rate divisor rather than using a hard-coded value.
* A final test with unmodified code has shown that a delay of 150msmarcel2013-08-301-1/+1
| | | | | | | | | | | | | | is not giving us a 100% success rate. Bump the delay to 200ms as that seems to do the trick. Note that during testing the delay was added to uart_bus_attach() in uart_core.c. While having the delay in a different place can change the behaviour, it was not expected. Having to bump the delay with another 50ms could therefore be an indication that the problem can not be solved with delays. Reported by: kevlo@ Tested by: kevlo@
* Work-around a timing problem with the ITE IT8513E now that the coremarcel2013-08-291-1/+13
| | | | | | | | | | | calls ns8250_bus_ipend() almost immediately after ns8250_bus_attach(). As it appears, a line break condition is being signalled for almost all received characters due to this. A delay of 150ms seems enough to allow the H/W to settle and to avoid the problem. More analysis is needed, but for now a regression has been addressed. Reported by: kevlo@ Tested by: kevlo@
* Add support for uarts other than the serial console in TI OMAP SoCs.ian2013-08-214-0/+146
| | | | | | | | | The TI uart hardware is ns16550-compatible, except that before it can be used the clocks and power have to be enabled and a non-standard mode control register has to be set to put the device in uart mode (as opposed to irDa or other serial protocols). This adds the extra code in an extension to the standard ns8250 probe routine, and the rest of the driver is just the standard ns8250 code.
* Make the uart ns8250 high-level interface public rather than static.ian2013-08-212-38/+73
| | | | | | This makes it easier to implement new drivers which are "mostly ns8250" but with some small difference such as needing to enable clocks or poke a non-standard register at probe or attach time.
* Use an if/else sequence rather than unrelated if statements, so that aian2013-08-211-7/+7
| | | | | | device compatible with multiple drivers matches the more specific driver first and doesn't overwrite it later with the more generic. Move the generic ns16550 to the end of the list.
* Check for generic ns16550 after all other types. A device may be compatibleian2013-08-211-3/+3
| | | | with 16550 but also have a more specific/capable driver earlier in the list.
* Allow UART_POLL_FREQ to be set as a kernel option as well as via tunableian2013-08-191-1/+1
| | | | | | (the code was already set up for this, just needs to be in conf/options). Also, if reporting that polling is being used, report the frequency too.
* Set the device description after we call uart_probe(). In uart_probe()marcel2013-07-251-1/+7
| | | | | | | | | we call device-specific probe functions, which can (and typically will) set the device description based on low-level device probe information. In the end we never actually used the device description that we so carefully maintained in the PCI match table. By setting the device description after we call uart_probe(), we'll print the more user- friendly description by default.
* Protect against broken hardware. In this particular case, protect againstmarcel2013-07-101-48/+60
| | | | | | | | | | | | | | | | | | | | | | H/W not de-asserting the interrupt at all. On x86, and because of the following conditions, this results in a hard hang with interrupts disabled: 1. The uart(4) driver uses a spin lock to protect against concurrent access to the H/W. Spin locks disable and restore interrupts. 2. Restoring the interrupt on x86 always writes the flags register. Even if we're restoring the interrupt from disabled to disabled. 3. The x86 CPU has a short window in which interrupts are enabled when the flags register is written. 4. The uart(4) driver registers a fast interrupt by default. To catch this case, we first try to clear any pending H/W interrupts and in particular, before setting up the interrupt. This makes sure the interrupt is masked on the PIC. The interrupt handler now has a limit set on the number of iterations it'll go through to clear interrupt conditions. If the limit is hit, the handler will return FILTER_SCHEDULE_THREAD. The attach function will check for this return code and avoid setting up the interrupt and foce polling in that case. Obtained from: Juniper Networks, Inc.
* Teach UART to attach Exynos/s3/s5 class driver.ray2013-06-294-0/+6
| | | | | Submitted by: Ruslan Bukin <br@bsdpad.com> Reviewed by: gonzo
* Add basic support for FDT to i386 & amd64. This change includes:marcel2013-05-212-98/+175
| | | | | | | | | | | | | | | | | | | | | | 1. Common headers for fdt.h and ofw_machdep.h under x86/include with indirections under i386/include and amd64/include. 2. New modinfo for loader provided FDT blob. 3. Common x86_init_fdt() called from hammer_time() on amd64 and init386() on i386. 4. Split-off FDT specific low-level console functions from FDT bus methods for the uart(4) driver. The low-level console logic has been moved to uart_cpu_fdt.c and is used for arm, mips & powerpc only. The FDT bus methods are shared across all architectures. 5. Add dev/fdt/fdt_x86.c to hold the fdt_fixup_table[] and the fdt_pic_table[] arrays. Both are empty right now. FDT addresses are I/O ports on x86. Since the core FDT code does not handle different address spaces, adding support for both I/O ports and memory addresses requires some thought and discussion. It may be better to use a compile-time option that controls this. Obtained from: Juniper Networks, Inc.
* Fix several typoseadler2013-05-121-2/+2
| | | | | | PR: kern/176054 Submitted by: Christoph Mallon <christoph.mallon@gmx.de> MFC after: 3 days
* Add Xilinx Zynq ARM/FPGA SoC support to FreeBSD/arm port.wkoszek2013-04-272-0/+5
| | | | | | Submitted by: Thomas Skibo <ThomasSkibo (at) sbcglobal.net> Tested by: wkoszek (ZedBoard) Reviewed by: wkoszek, freebsd-arm@ (no objections raised)
* Add support for Intel C600/X79 Series Chipset KT Controller.eadler2013-04-231-0/+1
| | | | | PR: kern/177072 Submitted by: Kurt Lidl <lidl@pix.net>
* Build uart_dev_lpc.c on arm only. This fixes pc98 build.nyan2013-04-221-0/+2
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* Fix low-level uart drivers that set their fifo sizes in the softc too late.ian2013-04-015-15/+15
| | | | | | | | | uart(4) allocates send and receiver buffers in attach() before it calls the low-level driver's attach routine. Many low-level drivers set the fifo sizes in their attach routine, which is too late. Other drivers set them in the probe() routine, so that they're available when uart(4) allocates buffers. This fixes the ones that were setting the values too late by moving the code to probe().
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