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* Allow uart to attach to keyboards that are not the firmware's notion ofjake2003-11-111-13/+34
| | | | | stdin, such as when using a serial console. We must recognize these devices here so that we can override the tty attach routine.
* Remove explicit cardbus attachments from drivers where this is identicaldfr2003-11-031-1/+0
| | | | | | | to the pci attachment. Cardbus is a derived class of pci so all pci drivers are automatically available for matching against cardbus devices. Reviewed by: imp
* Include pccard/pccard_cis.h here tooimp2003-10-071-1/+2
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* Don't explicitly initialize d_maj in the cdevsw with MAJOR_AUTO, asmarcel2003-09-281-1/+0
| | | | | per the intentions of conf.h, rev 1.176. This change is a no-op as MAJOR_AUTO equals to 0.
* Set the baud rate to 1200 if the device is a keyboard.jake2003-09-281-1/+4
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* Catch up with the console interface change: the use of makedev() hasmarcel2003-09-261-3/+2
| | | | | | | been abandoned in favor of a (device) name-based approach. Submitted by: phk Tested on: alpha
* Revert the introduction of iobase in struct uart_bas. Both the SAB82532marcel2003-09-2617-61/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and the Z8530 drivers used the I/O address as a quick and dirty way to determine which channel they operated on, but formalizing this by introducing iobase is not a solution. How for example would a driver know which channel it controls for a multi-channel UART that only has a single I/O range? Instead, add an explicit field, called chan, to struct uart_bas that holds the channel within a device, or 0 otherwise. The chan field is initialized both by the system device probing (i.e. a system console) or it is passed down to uart_bus_probe() by any of the bus front-ends. As such, it impacts all platforms and bus drivers and makes it a rather large commit. Remove the use of iobase in uart_cpu_eqres() for pc98. It is expected that platforms have the capability to compare tag and handle pairs for equality; as to determine whether two pairs access the same device or not. The use of iobase for pc98 makes it impossible to formalize this and turn it into a real newbus function later. This commit reverts uart_cpu_eqres() for pc98 to an unimplemented function. It has to be reimplemented using only the tag and handle fields in struct uart_bas. Rewrite the SAB82532 and Z8530 drivers to use the chan field in struct uart_bas. Remove the IS_CHANNEL_A and IS_CHANNEL_B macros. We don't need to abstract anything anymore. Discussed with: nyan Tested on: i386, ia64, sparc64
* Don't return to search another ports even if bus_space_map() fails.nyan2003-09-235-6/+6
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* Initialize iobase, bsh and bst.nyan2003-09-231-0/+4
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* Compare base address instead of bus_handle.nyan2003-09-231-1/+1
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* - Keep the base address in struct uart_bas for sab82532 and z8530 modules.nyan2003-09-2311-51/+17
| | | | - Remove buggy uart_cpu_busaddr() function.
* Remove unneeded includes.nyan2003-09-231-5/+0
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* Use bus_space_map() to initialize a bus_handle.nyan2003-09-235-9/+17
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* In uart_intr() loop until all interrupts have been handled. Previouslymarcel2003-09-174-19/+57
| | | | | | | | | | | | | | an UART interface could get stuck when a new interrupt condition arose while servicing a previous interrupt. Since an interrupt was already pending, no new interrupt would be triggered. Avoid infinite recursion by flushing the Rx FIFO and marking an overrun condition when we could not move the data from the Rx FIFO to the receive buffer in toto. Failure to flush the Rx FIFO would leave the Rx ready condition pending. Note that the SAB 82532 already did this due to the nature of the chip.
* Add locking to the hardware drivers. I intended to figure out moremarcel2003-09-177-27/+117
| | | | | | | | | | precisely where locking would be needed before adding it, but it seems uart(4) draws slightly too much attention to have it without locking for too long. The lock added is a spinlock that protects access to the underlying hardware. As a first and obvious stab at this, each method of the hardware interface grabs the lock. Roughly speaking this serializes the methods. Exceptions are the probe, attach and detach methods.
* Remove inclusion of <sys/timepps.h>. It's included in "uart_bus.h"marcel2003-09-151-1/+0
| | | | to avoid having to include it in almost all other source files.
* Remove useless #ifdef PC98.takawata2003-09-151-3/+1
| | | | Submitted by: nyan
* Add uart pccard bus attachment,based on sio_pccard.c .takawata2003-09-141-0/+109
| | | | | | Wrote at: Hakone. Powered by: Warner Losh's scotch whisky. Tested by: nork
* Add support for automatic hardware flow control for 16[679]50 UARTs.marcel2003-09-131-1/+37
| | | | | | We simply use the detected FIFO size to determine whether we have a post 16550 UART or not. The support lacks proper serialization of hardware access for now.
* When determining the device class to use for the serial console, checktmm2003-09-121-2/+5
| | | | | | | the "compatible" property too in the ns8250 case. This gets the serial console to work on Blade 100s, where the device name is just "serial". Reviewed by: marcel
* Add support for using uart(4) for pulse capturing for the Pulse Permarcel2003-09-113-2/+38
| | | | | | | | | | | | Second (PPS) timing interface. The support is non-optional and by default uses the DCD line signal as the pulse input. A compile-time option (UART_PPS_ON_CTS) can be used to have uart(4) use the CTS line signal. Include <sys/timepps.h> in uart_bus.h to avoid having to add the inclusion of that header in all source files. Reviewed by: phk
* Minor commentary cleanup, since I didn't understand the comments thatimp2003-09-111-4/+4
| | | | I wrote.
* Fix compile on pc98. Maybe this is correct.imp2003-09-111-1/+2
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* If we failed to size the Rx FIFO, assume the worst. This howevermarcel2003-09-101-1/+1
| | | | | | | | is not a size of 1. Since we already know there is a FIFO, we can safely assume that it is at least 16 bytes. Note that all this is mostly academic anyway. We don't use the size of the Rx FIFO currently. If we add support for hardware flow control, we only care about Rx FIFO sizes larger than 16.
* Remove the assumption that a bus_space_handle_t is an I/O addressmarcel2003-09-079-48/+91
| | | | | | | | | | | | | | from the SAB82532 and the Z8530 hardware drivers by introducing uart_cpu_busaddr(). The assumption is not true on pc98 where bus_space_handle_t is a pointer to a structure. The uart_cpu_busaddr() function will return the bus address corresponding the tag and handle given to it by the BAS. WARNING: the intend of the function is STRICTLY to allow hardware drivers to determine which logical channel they control and is NOT to be used for actual I/O. It is therefore EXPLICITLY allowed that uart_cpu_busaddr() returns only the lower 8 bits of the address and garbage in all other bits. No mistakes...
* Better stab at MD code for pc98. The 8251 stuff is a total lieimp2003-09-074-0/+976
| | | | | | (ns8250 copied and s/ns8250/i8251/g), but there for linkage purposes. Real code to follow, once I get past some boot issues on my pc98 boxes with recent current.
* The uart(4) driver is an universal driver for various UART hardware.marcel2003-09-0622-0/+5330
It improves on sio(4) in the following areas: o Fully newbusified to allow for memory mapped I/O. This is a must for ia64 and sparc64, o Machine dependent code to take full advantage of machine and firm- ware specific ways to define serial consoles and/or debug ports. o Hardware abstraction layer to allow the driver to be used with various UARTs, such as the well-known ns8250 family of UARTs, the Siemens sab82532 or the Zilog Z8530. This is especially important for pc98 and sparc64 where it's common to have different UARTs, o The notion of system devices to unkludge low-level consoles and remote gdb ports and provides the mechanics necessary to support the keyboard on sparc64 (which is UART based). o The notion of a kernel interface so that a UART can be tied to something other than the well-known TTY interface. This is needed on sparc64 to present the user with a device and ioctl handling suitable for a keyboard, but also allows us to cleanly hide an UART when used as a debug port. Following is a list of features and bugs/flaws specific to the ns8250 family of UARTs as compared to their support in sio(4): o The uart(4) driver determines the FIFO size and automaticly takes advantages of larger FIFOs and/or additional features. Note that since I don't have sufficient access to 16[679]5x UARTs, hardware flow control has not been enabled. This is almost trivial to do, provided one can test. The downside of this is that broken UARTs are more likely to not work correctly with uart(4). The need for tunables or knobs may be large enough to warrant their creation. o The uart(4) driver does not share the same bumpy history as sio(4) and will therefore not provide the necessary hooks, tweaks, quirks or work-arounds to deal with once common hardware. To that extend, uart(4) supports a subset of the UARTs that sio(4) supports. The question before us is whether the subset is sufficient for current hardware. o There is no support for multiport UARTs in uart(4). The decision behind this is that uart(4) deals with one EIA RS232-C interface. Packaging of multiple interfaces in a single chip or on a single expansion board is beyond the scope of uart(4) and is now mostly left for puc(4) to deal with. Lack of hardware made it impossible to actually implement such a dependency other than is present for the dual channel SAB82532 and Z8350 SCCs. The current list of missing features is: o No configuration capabilities. A set of tunables and sysctls is being worked out. There are likely not going to be any or much compile-time knobs. Such configuration does not fit well with current hardware. o No support for the PPS API. This is partly dependent on the ability to configure uart(4) and partly dependent on having sufficient information to implement it properly. As usual, the manpage is present but lacks the attention the software has gotten.
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